Lines Matching refs:port
60 static inline void wait_for_xmitr(struct uart_port *port) in wait_for_xmitr() argument
62 while (!(msm_read(port, UART_SR) & UART_SR_TX_EMPTY)) { in wait_for_xmitr()
63 if (msm_read(port, UART_ISR) & UART_ISR_TX_READY) in wait_for_xmitr()
67 msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR); in wait_for_xmitr()
70 static void msm_stop_tx(struct uart_port *port) in msm_stop_tx() argument
72 struct msm_port *msm_port = UART_TO_MSM(port); in msm_stop_tx()
75 msm_write(port, msm_port->imr, UART_IMR); in msm_stop_tx()
78 static void msm_start_tx(struct uart_port *port) in msm_start_tx() argument
80 struct msm_port *msm_port = UART_TO_MSM(port); in msm_start_tx()
83 msm_write(port, msm_port->imr, UART_IMR); in msm_start_tx()
86 static void msm_stop_rx(struct uart_port *port) in msm_stop_rx() argument
88 struct msm_port *msm_port = UART_TO_MSM(port); in msm_stop_rx()
91 msm_write(port, msm_port->imr, UART_IMR); in msm_stop_rx()
94 static void msm_enable_ms(struct uart_port *port) in msm_enable_ms() argument
96 struct msm_port *msm_port = UART_TO_MSM(port); in msm_enable_ms()
99 msm_write(port, msm_port->imr, UART_IMR); in msm_enable_ms()
102 static void handle_rx_dm(struct uart_port *port, unsigned int misr) in handle_rx_dm() argument
104 struct tty_port *tport = &port->state->port; in handle_rx_dm()
107 struct msm_port *msm_port = UART_TO_MSM(port); in handle_rx_dm()
109 if ((msm_read(port, UART_SR) & UART_SR_OVERRUN)) { in handle_rx_dm()
110 port->icount.overrun++; in handle_rx_dm()
112 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in handle_rx_dm()
116 count = msm_read(port, UARTDM_RX_TOTAL_SNAP) - in handle_rx_dm()
120 count = 4 * (msm_read(port, UART_RFWR)); in handle_rx_dm()
126 port->icount.rx += count; in handle_rx_dm()
132 sr = msm_read(port, UART_SR); in handle_rx_dm()
138 ioread32_rep(port->membase + UARTDM_RF, buf, 1); in handle_rx_dm()
145 port->icount.brk++; in handle_rx_dm()
148 if (uart_handle_break(port)) in handle_rx_dm()
152 if (!(port->read_status_mask & UART_SR_RX_BREAK)) in handle_rx_dm()
155 spin_unlock(&port->lock); in handle_rx_dm()
156 sysrq = uart_handle_sysrq_char(port, buf[i]); in handle_rx_dm()
157 spin_lock(&port->lock); in handle_rx_dm()
164 spin_unlock(&port->lock); in handle_rx_dm()
166 spin_lock(&port->lock); in handle_rx_dm()
169 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); in handle_rx_dm()
170 msm_write(port, 0xFFFFFF, UARTDM_DMRX); in handle_rx_dm()
171 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in handle_rx_dm()
174 static void handle_rx(struct uart_port *port) in handle_rx() argument
176 struct tty_port *tport = &port->state->port; in handle_rx()
183 if ((msm_read(port, UART_SR) & UART_SR_OVERRUN)) { in handle_rx()
184 port->icount.overrun++; in handle_rx()
186 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in handle_rx()
190 while ((sr = msm_read(port, UART_SR)) & UART_SR_RX_READY) { in handle_rx()
195 c = msm_read(port, UART_RF); in handle_rx()
198 port->icount.brk++; in handle_rx()
199 if (uart_handle_break(port)) in handle_rx()
202 port->icount.frame++; in handle_rx()
204 port->icount.rx++; in handle_rx()
208 sr &= port->read_status_mask; in handle_rx()
215 spin_unlock(&port->lock); in handle_rx()
216 sysrq = uart_handle_sysrq_char(port, c); in handle_rx()
217 spin_lock(&port->lock); in handle_rx()
222 spin_unlock(&port->lock); in handle_rx()
224 spin_lock(&port->lock); in handle_rx()
227 static void reset_dm_count(struct uart_port *port, int count) in reset_dm_count() argument
229 wait_for_xmitr(port); in reset_dm_count()
230 msm_write(port, count, UARTDM_NCF_TX); in reset_dm_count()
231 msm_read(port, UARTDM_NCF_TX); in reset_dm_count()
234 static void handle_tx(struct uart_port *port) in handle_tx() argument
236 struct circ_buf *xmit = &port->state->xmit; in handle_tx()
237 struct msm_port *msm_port = UART_TO_MSM(port); in handle_tx()
243 tf = port->membase + UARTDM_TF; in handle_tx()
245 tf = port->membase + UART_TF; in handle_tx()
249 port->fifosize); in handle_tx()
251 if (port->x_char) { in handle_tx()
253 reset_dm_count(port, tx_count + 1); in handle_tx()
255 iowrite8_rep(tf, &port->x_char, 1); in handle_tx()
256 port->icount.tx++; in handle_tx()
257 port->x_char = 0; in handle_tx()
259 reset_dm_count(port, tx_count); in handle_tx()
266 if (!(msm_read(port, UART_SR) & UART_SR_TX_READY)) in handle_tx()
277 port->icount.tx++; in handle_tx()
287 msm_stop_tx(port); in handle_tx()
290 uart_write_wakeup(port); in handle_tx()
293 static void handle_delta_cts(struct uart_port *port) in handle_delta_cts() argument
295 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); in handle_delta_cts()
296 port->icount.cts++; in handle_delta_cts()
297 wake_up_interruptible(&port->state->port.delta_msr_wait); in handle_delta_cts()
302 struct uart_port *port = dev_id; in msm_irq() local
303 struct msm_port *msm_port = UART_TO_MSM(port); in msm_irq()
306 spin_lock(&port->lock); in msm_irq()
307 misr = msm_read(port, UART_MISR); in msm_irq()
308 msm_write(port, 0, UART_IMR); /* disable interrupt */ in msm_irq()
312 msm_write(port, UART_CR_CMD_RESET_RXBREAK_START, UART_CR); in msm_irq()
317 handle_rx_dm(port, misr); in msm_irq()
319 handle_rx(port); in msm_irq()
322 handle_tx(port); in msm_irq()
324 handle_delta_cts(port); in msm_irq()
326 msm_write(port, msm_port->imr, UART_IMR); /* restore interrupt */ in msm_irq()
327 spin_unlock(&port->lock); in msm_irq()
332 static unsigned int msm_tx_empty(struct uart_port *port) in msm_tx_empty() argument
334 return (msm_read(port, UART_SR) & UART_SR_TX_EMPTY) ? TIOCSER_TEMT : 0; in msm_tx_empty()
337 static unsigned int msm_get_mctrl(struct uart_port *port) in msm_get_mctrl() argument
342 static void msm_reset(struct uart_port *port) in msm_reset() argument
344 struct msm_port *msm_port = UART_TO_MSM(port); in msm_reset()
347 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR); in msm_reset()
348 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR); in msm_reset()
349 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in msm_reset()
350 msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR); in msm_reset()
351 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); in msm_reset()
352 msm_write(port, UART_CR_CMD_SET_RFR, UART_CR); in msm_reset()
356 msm_write(port, 0, UARTDM_DMEN); in msm_reset()
359 static void msm_set_mctrl(struct uart_port *port, unsigned int mctrl) in msm_set_mctrl() argument
363 mr = msm_read(port, UART_MR1); in msm_set_mctrl()
367 msm_write(port, mr, UART_MR1); in msm_set_mctrl()
368 msm_write(port, UART_CR_CMD_RESET_RFR, UART_CR); in msm_set_mctrl()
371 msm_write(port, mr, UART_MR1); in msm_set_mctrl()
375 static void msm_break_ctl(struct uart_port *port, int break_ctl) in msm_break_ctl() argument
378 msm_write(port, UART_CR_CMD_START_BREAK, UART_CR); in msm_break_ctl()
380 msm_write(port, UART_CR_CMD_STOP_BREAK, UART_CR); in msm_break_ctl()
390 msm_find_best_baud(struct uart_port *port, unsigned int baud) in msm_find_best_baud() argument
413 divisor = uart_get_divisor(port, baud); in msm_find_best_baud()
422 static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) in msm_set_baud_rate() argument
425 struct msm_port *msm_port = UART_TO_MSM(port); in msm_set_baud_rate()
428 entry = msm_find_best_baud(port, baud); in msm_set_baud_rate()
430 msm_write(port, entry->code, UART_CSR); in msm_set_baud_rate()
437 msm_write(port, watermark, UART_IPR); in msm_set_baud_rate()
440 watermark = (port->fifosize * 3) / 4; in msm_set_baud_rate()
441 msm_write(port, watermark, UART_RFWR); in msm_set_baud_rate()
444 msm_write(port, 10, UART_TFWR); in msm_set_baud_rate()
446 msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR); in msm_set_baud_rate()
447 msm_reset(port); in msm_set_baud_rate()
450 msm_write(port, UART_CR_TX_ENABLE | UART_CR_RX_ENABLE, UART_CR); in msm_set_baud_rate()
456 msm_write(port, msm_port->imr, UART_IMR); in msm_set_baud_rate()
459 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); in msm_set_baud_rate()
460 msm_write(port, 0xFFFFFF, UARTDM_DMRX); in msm_set_baud_rate()
461 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in msm_set_baud_rate()
467 static void msm_init_clock(struct uart_port *port) in msm_init_clock() argument
469 struct msm_port *msm_port = UART_TO_MSM(port); in msm_init_clock()
473 msm_serial_set_mnd_regs(port); in msm_init_clock()
476 static int msm_startup(struct uart_port *port) in msm_startup() argument
478 struct msm_port *msm_port = UART_TO_MSM(port); in msm_startup()
483 "msm_serial%d", port->line); in msm_startup()
485 ret = request_irq(port->irq, msm_irq, IRQF_TRIGGER_HIGH, in msm_startup()
486 msm_port->name, port); in msm_startup()
490 msm_init_clock(port); in msm_startup()
492 if (likely(port->fifosize > 12)) in msm_startup()
493 rfr_level = port->fifosize - 12; in msm_startup()
495 rfr_level = port->fifosize; in msm_startup()
498 data = msm_read(port, UART_MR1); in msm_startup()
503 msm_write(port, data, UART_MR1); in msm_startup()
507 static void msm_shutdown(struct uart_port *port) in msm_shutdown() argument
509 struct msm_port *msm_port = UART_TO_MSM(port); in msm_shutdown()
512 msm_write(port, 0, UART_IMR); /* disable interrupts */ in msm_shutdown()
516 free_irq(port->irq, port); in msm_shutdown()
519 static void msm_set_termios(struct uart_port *port, struct ktermios *termios, in msm_set_termios() argument
525 spin_lock_irqsave(&port->lock, flags); in msm_set_termios()
528 baud = uart_get_baud_rate(port, termios, old, 300, 115200); in msm_set_termios()
529 baud = msm_set_baud_rate(port, baud); in msm_set_termios()
534 mr = msm_read(port, UART_MR2); in msm_set_termios()
571 msm_write(port, mr, UART_MR2); in msm_set_termios()
574 mr = msm_read(port, UART_MR1); in msm_set_termios()
580 msm_write(port, mr, UART_MR1); in msm_set_termios()
583 port->read_status_mask = 0; in msm_set_termios()
585 port->read_status_mask |= UART_SR_PAR_FRAME_ERR; in msm_set_termios()
587 port->read_status_mask |= UART_SR_RX_BREAK; in msm_set_termios()
589 uart_update_timeout(port, termios->c_cflag, baud); in msm_set_termios()
591 spin_unlock_irqrestore(&port->lock, flags); in msm_set_termios()
594 static const char *msm_type(struct uart_port *port) in msm_type() argument
599 static void msm_release_port(struct uart_port *port) in msm_release_port() argument
601 struct platform_device *pdev = to_platform_device(port->dev); in msm_release_port()
610 release_mem_region(port->mapbase, size); in msm_release_port()
611 iounmap(port->membase); in msm_release_port()
612 port->membase = NULL; in msm_release_port()
615 static int msm_request_port(struct uart_port *port) in msm_request_port() argument
617 struct platform_device *pdev = to_platform_device(port->dev); in msm_request_port()
628 if (!request_mem_region(port->mapbase, size, "msm_serial")) in msm_request_port()
631 port->membase = ioremap(port->mapbase, size); in msm_request_port()
632 if (!port->membase) { in msm_request_port()
640 release_mem_region(port->mapbase, size); in msm_request_port()
644 static void msm_config_port(struct uart_port *port, int flags) in msm_config_port() argument
649 port->type = PORT_MSM; in msm_config_port()
650 ret = msm_request_port(port); in msm_config_port()
656 static int msm_verify_port(struct uart_port *port, struct serial_struct *ser) in msm_verify_port() argument
660 if (unlikely(port->irq != ser->irq)) in msm_verify_port()
665 static void msm_power(struct uart_port *port, unsigned int state, in msm_power() argument
668 struct msm_port *msm_port = UART_TO_MSM(port); in msm_power()
685 static int msm_poll_get_char_single(struct uart_port *port) in msm_poll_get_char_single() argument
687 struct msm_port *msm_port = UART_TO_MSM(port); in msm_poll_get_char_single()
690 if (!(msm_read(port, UART_SR) & UART_SR_RX_READY)) in msm_poll_get_char_single()
693 return msm_read(port, rf_reg) & 0xff; in msm_poll_get_char_single()
696 static int msm_poll_get_char_dm(struct uart_port *port) in msm_poll_get_char_dm() argument
708 } else if (!(msm_read(port, UART_SR) & UART_SR_RX_READY)) { in msm_poll_get_char_dm()
713 count = msm_read(port, UARTDM_RXFS); in msm_poll_get_char_dm()
716 msm_write(port, UART_CR_CMD_FORCE_STALE, UART_CR); in msm_poll_get_char_dm()
717 slop = msm_read(port, UARTDM_RF); in msm_poll_get_char_dm()
720 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); in msm_poll_get_char_dm()
721 msm_write(port, 0xFFFFFF, UARTDM_DMRX); in msm_poll_get_char_dm()
722 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, in msm_poll_get_char_dm()
729 slop = msm_read(port, UARTDM_RF); in msm_poll_get_char_dm()
737 static int msm_poll_get_char(struct uart_port *port) in msm_poll_get_char() argument
741 struct msm_port *msm_port = UART_TO_MSM(port); in msm_poll_get_char()
744 imr = msm_read(port, UART_IMR); in msm_poll_get_char()
745 msm_write(port, 0, UART_IMR); in msm_poll_get_char()
748 c = msm_poll_get_char_dm(port); in msm_poll_get_char()
750 c = msm_poll_get_char_single(port); in msm_poll_get_char()
753 msm_write(port, imr, UART_IMR); in msm_poll_get_char()
758 static void msm_poll_put_char(struct uart_port *port, unsigned char c) in msm_poll_put_char() argument
761 struct msm_port *msm_port = UART_TO_MSM(port); in msm_poll_put_char()
764 imr = msm_read(port, UART_IMR); in msm_poll_put_char()
765 msm_write(port, 0, UART_IMR); in msm_poll_put_char()
768 reset_dm_count(port, 1); in msm_poll_put_char()
771 while (!(msm_read(port, UART_SR) & UART_SR_TX_READY)) in msm_poll_put_char()
775 msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : UART_TF); in msm_poll_put_char()
778 while (!(msm_read(port, UART_SR) & UART_SR_TX_READY)) in msm_poll_put_char()
782 msm_write(port, imr, UART_IMR); in msm_poll_put_char()
848 static void __msm_console_write(struct uart_port *port, const char *s, in __msm_console_write() argument
857 tf = port->membase + UARTDM_TF; in __msm_console_write()
859 tf = port->membase + UART_TF; in __msm_console_write()
867 spin_lock(&port->lock); in __msm_console_write()
869 reset_dm_count(port, count); in __msm_console_write()
897 while (!(msm_read(port, UART_SR) & UART_SR_TX_READY)) in __msm_console_write()
903 spin_unlock(&port->lock); in __msm_console_write()
909 struct uart_port *port; in msm_console_write() local
914 port = get_port_from_line(co->index); in msm_console_write()
915 msm_port = UART_TO_MSM(port); in msm_console_write()
917 __msm_console_write(port, s, count, msm_port->is_uartdm); in msm_console_write()
922 struct uart_port *port; in msm_console_setup() local
931 port = get_port_from_line(co->index); in msm_console_setup()
933 if (unlikely(!port->membase)) in msm_console_setup()
936 msm_init_clock(port); in msm_console_setup()
941 pr_info("msm_serial: console setup on port #%d\n", port->line); in msm_console_setup()
943 return uart_set_options(port, co, baud, parity, bits, flow); in msm_console_setup()
951 __msm_console_write(&dev->port, s, n, false); in msm_serial_early_write()
957 if (!device->port.membase) in msm_serial_early_console_setup()
972 __msm_console_write(&dev->port, s, n, true); in msm_serial_early_write_dm()
979 if (!device->port.membase) in msm_serial_early_console_setup_dm()
1029 struct uart_port *port; in msm_serial_probe() local
1046 port = get_port_from_line(line); in msm_serial_probe()
1047 port->dev = &pdev->dev; in msm_serial_probe()
1048 msm_port = UART_TO_MSM(port); in msm_serial_probe()
1068 port->uartclk = clk_get_rate(msm_port->clk); in msm_serial_probe()
1069 dev_info(&pdev->dev, "uartclk = %d\n", port->uartclk); in msm_serial_probe()
1074 port->mapbase = resource->start; in msm_serial_probe()
1079 port->irq = irq; in msm_serial_probe()
1081 platform_set_drvdata(pdev, port); in msm_serial_probe()
1083 return uart_add_one_port(&msm_uart_driver, port); in msm_serial_probe()
1088 struct uart_port *port = platform_get_drvdata(pdev); in msm_serial_remove() local
1090 uart_remove_one_port(&msm_uart_driver, port); in msm_serial_remove()