Lines Matching refs:membase
293 ucr->ucr1 = readl(port->membase + UCR1); in imx_port_ucrs_save()
294 ucr->ucr2 = readl(port->membase + UCR2); in imx_port_ucrs_save()
295 ucr->ucr3 = readl(port->membase + UCR3); in imx_port_ucrs_save()
302 writel(ucr->ucr1, port->membase + UCR1); in imx_port_ucrs_restore()
303 writel(ucr->ucr2, port->membase + UCR2); in imx_port_ucrs_restore()
304 writel(ucr->ucr3, port->membase + UCR3); in imx_port_ucrs_restore()
368 temp = readl(port->membase + UCR1); in imx_stop_tx()
369 writel(temp & ~UCR1_TXMPTYEN, port->membase + UCR1); in imx_stop_tx()
373 readl(port->membase + USR2) & USR2_TXDC) { in imx_stop_tx()
374 temp = readl(port->membase + UCR2); in imx_stop_tx()
379 writel(temp, port->membase + UCR2); in imx_stop_tx()
381 temp = readl(port->membase + UCR4); in imx_stop_tx()
383 writel(temp, port->membase + UCR4); in imx_stop_tx()
404 temp = readl(sport->port.membase + UCR2); in imx_stop_rx()
405 writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2); in imx_stop_rx()
408 temp = readl(sport->port.membase + UCR1); in imx_stop_rx()
409 writel(temp & ~UCR1_RRDYEN, sport->port.membase + UCR1); in imx_stop_rx()
430 writel(sport->port.x_char, sport->port.membase + URTX0); in imx_transmit_buffer()
446 temp = readl(sport->port.membase + UCR1); in imx_transmit_buffer()
450 writel(temp, sport->port.membase + UCR1); in imx_transmit_buffer()
452 writel(temp, sport->port.membase + UCR1); in imx_transmit_buffer()
458 !(readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL)) { in imx_transmit_buffer()
461 writel(xmit->buf[xmit->tail], sport->port.membase + URTX0); in imx_transmit_buffer()
485 temp = readl(sport->port.membase + UCR1); in dma_tx_callback()
487 writel(temp, sport->port.membase + UCR1); in dma_tx_callback()
559 temp = readl(sport->port.membase + UCR1); in imx_dma_tx()
561 writel(temp, sport->port.membase + UCR1); in imx_dma_tx()
580 temp = readl(port->membase + UCR2); in imx_start_tx()
585 writel(temp, port->membase + UCR2); in imx_start_tx()
587 temp = readl(port->membase + UCR4); in imx_start_tx()
589 writel(temp, port->membase + UCR4); in imx_start_tx()
593 temp = readl(sport->port.membase + UCR1); in imx_start_tx()
594 writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); in imx_start_tx()
601 temp = readl(sport->port.membase + UCR1); in imx_start_tx()
604 writel(temp, sport->port.membase + UCR1); in imx_start_tx()
623 writel(USR1_RTSD, sport->port.membase + USR1); in imx_rtsint()
624 val = readl(sport->port.membase + USR1) & USR1_RTSS; in imx_rtsint()
652 while (readl(sport->port.membase + USR2) & USR2_RDR) { in imx_rxint()
656 rx = readl(sport->port.membase + URXD0); in imx_rxint()
658 temp = readl(sport->port.membase + USR2); in imx_rxint()
660 writel(USR2_BRCD, sport->port.membase + USR2); in imx_rxint()
724 temp = readl(sport->port.membase + USR2); in imx_dma_rxint()
729 temp = readl(sport->port.membase + UCR1); in imx_dma_rxint()
731 writel(temp, sport->port.membase + UCR1); in imx_dma_rxint()
746 sts = readl(sport->port.membase + USR1); in imx_int()
747 sts2 = readl(sport->port.membase + USR2); in imx_int()
757 readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) || in imx_int()
759 readl(sport->port.membase + UCR4) & UCR4_TCEN)) in imx_int()
766 writel(USR1_AWAKE, sport->port.membase + USR1); in imx_int()
771 writel(USR2_ORE, sport->port.membase + USR2); in imx_int()
785 ret = (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; in imx_tx_empty()
802 if (readl(sport->port.membase + USR1) & USR1_RTSS) in imx_get_mctrl()
805 if (readl(sport->port.membase + UCR2) & UCR2_CTS) in imx_get_mctrl()
808 if (readl(sport->port.membase + uts_reg(sport)) & UTS_LOOP) in imx_get_mctrl()
820 temp = readl(sport->port.membase + UCR2); in imx_set_mctrl()
824 writel(temp, sport->port.membase + UCR2); in imx_set_mctrl()
827 temp = readl(sport->port.membase + uts_reg(sport)) & ~UTS_LOOP; in imx_set_mctrl()
830 writel(temp, sport->port.membase + uts_reg(sport)); in imx_set_mctrl()
843 temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; in imx_break_ctl()
848 writel(temp, sport->port.membase + UCR1); in imx_break_ctl()
861 val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE); in imx_setup_ufcr()
863 writel(val, sport->port.membase + UFCR); in imx_setup_ufcr()
876 temp = readl(sport->port.membase + UCR1); in imx_rx_dma_done()
878 writel(temp, sport->port.membase + UCR1); in imx_rx_dma_done()
915 if (readl(sport->port.membase + USR2) & USR2_IDLE) { in dma_rx_callback()
919 writel(USR2_IDLE, sport->port.membase + USR2); in dma_rx_callback()
930 } else if (readl(sport->port.membase + USR2) & USR2_RDR) { in dma_rx_callback()
1058 temp = readl(sport->port.membase + UCR1); in imx_enable_dma()
1062 writel(temp, sport->port.membase + UCR1); in imx_enable_dma()
1065 temp = readl(sport->port.membase + UCR4); in imx_enable_dma()
1067 writel(temp, sport->port.membase + UCR4); in imx_enable_dma()
1077 temp = readl(sport->port.membase + UCR1); in imx_disable_dma()
1079 writel(temp, sport->port.membase + UCR1); in imx_disable_dma()
1082 temp = readl(sport->port.membase + UCR2); in imx_disable_dma()
1084 writel(temp, sport->port.membase + UCR2); in imx_disable_dma()
1087 temp = readl(sport->port.membase + UCR4); in imx_disable_dma()
1089 writel(temp, sport->port.membase + UCR4); in imx_disable_dma()
1117 temp = readl(sport->port.membase + UCR4); in imx_startup()
1123 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); in imx_startup()
1128 temp = readl(sport->port.membase + UCR2); in imx_startup()
1130 writel(temp, sport->port.membase + UCR2); in imx_startup()
1132 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0)) in imx_startup()
1140 writel(USR1_RTSD, sport->port.membase + USR1); in imx_startup()
1141 writel(USR2_ORE, sport->port.membase + USR2); in imx_startup()
1143 temp = readl(sport->port.membase + UCR1); in imx_startup()
1146 writel(temp, sport->port.membase + UCR1); in imx_startup()
1148 temp = readl(sport->port.membase + UCR4); in imx_startup()
1150 writel(temp, sport->port.membase + UCR4); in imx_startup()
1152 temp = readl(sport->port.membase + UCR2); in imx_startup()
1156 writel(temp, sport->port.membase + UCR2); in imx_startup()
1159 temp = readl(sport->port.membase + UCR3); in imx_startup()
1161 writel(temp, sport->port.membase + UCR3); in imx_startup()
1200 temp = readl(sport->port.membase + UCR2); in imx_shutdown()
1202 writel(temp, sport->port.membase + UCR2); in imx_shutdown()
1215 temp = readl(sport->port.membase + UCR1); in imx_shutdown()
1218 writel(temp, sport->port.membase + UCR1); in imx_shutdown()
1240 temp = readl(sport->port.membase + UCR1); in imx_flush_buffer()
1242 writel(temp, sport->port.membase + UCR1); in imx_flush_buffer()
1253 ubir = readl(sport->port.membase + UBIR); in imx_flush_buffer()
1254 ubmr = readl(sport->port.membase + UBMR); in imx_flush_buffer()
1255 uts = readl(sport->port.membase + IMX21_UTS); in imx_flush_buffer()
1257 temp = readl(sport->port.membase + UCR2); in imx_flush_buffer()
1259 writel(temp, sport->port.membase + UCR2); in imx_flush_buffer()
1261 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0)) in imx_flush_buffer()
1265 writel(ubir, sport->port.membase + UBIR); in imx_flush_buffer()
1266 writel(ubmr, sport->port.membase + UBMR); in imx_flush_buffer()
1267 writel(uts, sport->port.membase + IMX21_UTS); in imx_flush_buffer()
1377 old_ucr1 = readl(sport->port.membase + UCR1); in imx_set_termios()
1379 sport->port.membase + UCR1); in imx_set_termios()
1381 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)) in imx_set_termios()
1385 old_txrxen = readl(sport->port.membase + UCR2); in imx_set_termios()
1387 sport->port.membase + UCR2); in imx_set_termios()
1413 ufcr = readl(sport->port.membase + UFCR); in imx_set_termios()
1417 writel(ufcr, sport->port.membase + UFCR); in imx_set_termios()
1419 writel(num, sport->port.membase + UBIR); in imx_set_termios()
1420 writel(denom, sport->port.membase + UBMR); in imx_set_termios()
1424 sport->port.membase + IMX21_ONEMS); in imx_set_termios()
1426 writel(old_ucr1, sport->port.membase + UCR1); in imx_set_termios()
1429 writel(ucr2 | old_txrxen, sport->port.membase + UCR2); in imx_set_termios()
1505 temp = readl(sport->port.membase + UCR1); in imx_poll_init()
1510 writel(temp, sport->port.membase + UCR1); in imx_poll_init()
1512 temp = readl(sport->port.membase + UCR2); in imx_poll_init()
1514 writel(temp, sport->port.membase + UCR2); in imx_poll_init()
1523 if (!(readl_relaxed(port->membase + USR2) & USR2_RDR)) in imx_poll_get_char()
1526 return readl_relaxed(port->membase + URXD0) & URXD_RX_DATA; in imx_poll_get_char()
1535 status = readl_relaxed(port->membase + USR1); in imx_poll_put_char()
1539 writel_relaxed(c, port->membase + URTX0); in imx_poll_put_char()
1543 status = readl_relaxed(port->membase + USR2); in imx_poll_put_char()
1566 temp = readl(sport->port.membase + UCR2); in imx_rs485_config()
1572 writel(temp, sport->port.membase + UCR2); in imx_rs485_config()
1610 while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL) in imx_console_putchar()
1613 writel(ch, sport->port.membase + URTX0); in imx_console_putchar()
1656 writel(ucr1, sport->port.membase + UCR1); in imx_console_write()
1658 writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2); in imx_console_write()
1666 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); in imx_console_write()
1686 if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) { in imx_console_get_options()
1692 ucr2 = readl(sport->port.membase + UCR2); in imx_console_get_options()
1707 ubir = readl(sport->port.membase + UBIR) & 0xffff; in imx_console_get_options()
1708 ubmr = readl(sport->port.membase + UBMR) & 0xffff; in imx_console_get_options()
1710 ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7; in imx_console_get_options()
1821 val = readl(sport->port.membase + UCR3); in serial_imx_suspend()
1823 writel(val, sport->port.membase + UCR3); in serial_imx_suspend()
1836 val = readl(sport->port.membase + UCR3); in serial_imx_resume()
1838 writel(val, sport->port.membase + UCR3); in serial_imx_resume()
1931 sport->port.membase = base; in serial_imx_probe()