Lines Matching refs:UCR4
53 #define UCR4 0x8c /* Control Register 4 */ macro
381 temp = readl(port->membase + UCR4); in imx_stop_tx()
383 writel(temp, port->membase + UCR4); in imx_stop_tx()
587 temp = readl(port->membase + UCR4); in imx_start_tx()
589 writel(temp, port->membase + UCR4); in imx_start_tx()
759 readl(sport->port.membase + UCR4) & UCR4_TCEN)) in imx_int()
1065 temp = readl(sport->port.membase + UCR4); in imx_enable_dma()
1067 writel(temp, sport->port.membase + UCR4); in imx_enable_dma()
1087 temp = readl(sport->port.membase + UCR4); in imx_disable_dma()
1089 writel(temp, sport->port.membase + UCR4); in imx_disable_dma()
1117 temp = readl(sport->port.membase + UCR4); in imx_startup()
1123 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); in imx_startup()
1148 temp = readl(sport->port.membase + UCR4); in imx_startup()
1150 writel(temp, sport->port.membase + UCR4); in imx_startup()