291 	writeb(temp, port->membase + UARTCR2);  in lpuart_stop_tx()
308 	writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2);  in lpuart_stop_rx()
354 		writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR);  in lpuart_pio_tx()
363 		writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS,  in lpuart_pio_tx()
406 		writeb(readb(sport->port.membase + UARTCR5) & ~UARTCR5_TDMAS,  in lpuart_prepare_tx()
409 		writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS,  in lpuart_prepare_tx()
508 	writeb(temp & ~UARTCR5_RDMAS, sport->port.membase + UARTCR5);  in lpuart_timer_func()
525 	writeb(temp | UARTCR5_RDMAS, sport->port.membase + UARTCR5);  in lpuart_prepare_rx()
536 		writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR);  in lpuart_transmit_buffer()
580 	writeb(temp | UARTCR2_TIE, port->membase + UARTCR2);  in lpuart_start_tx()
614 			writeb(sport->port.x_char, sport->port.membase + UARTDR);  in lpuart_txint()
866 	writeb(temp, port->membase + UARTMODEM);  in lpuart_set_mctrl()
894 	writeb(temp, port->membase + UARTCR2);  in lpuart_break_ctl()
918 	writeb(cr2, sport->port.membase + UARTCR2);  in lpuart_setup_watermark()
921 	writeb(val | UARTPFIFO_TXFE | UARTPFIFO_RXFE,  in lpuart_setup_watermark()
928 	writeb(UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH,  in lpuart_setup_watermark()
931 	writeb(0, sport->port.membase + UARTTWFIFO);  in lpuart_setup_watermark()
932 	writeb(1, sport->port.membase + UARTRWFIFO);  in lpuart_setup_watermark()
935 	writeb(cr2_saved, sport->port.membase + UARTCR2);  in lpuart_setup_watermark()
1099 		writeb(temp | UARTCR5_TDMAS, port->membase + UARTCR5);  in lpuart_startup()
1114 	writeb(temp, sport->port.membase + UARTCR2);  in lpuart_startup()
1166 	writeb(temp, port->membase + UARTCR2);  in lpuart_shutdown()
1316 	writeb(old_cr2 & ~(UARTCR2_TE | UARTCR2_RE),  in lpuart_set_termios()
1325 	writeb(cr4 | brfa, sport->port.membase + UARTCR4);  in lpuart_set_termios()
1326 	writeb(bdh, sport->port.membase + UARTBDH);  in lpuart_set_termios()
1327 	writeb(sbr & 0xFF, sport->port.membase + UARTBDL);  in lpuart_set_termios()
1328 	writeb(cr1, sport->port.membase + UARTCR1);  in lpuart_set_termios()
1329 	writeb(modem, sport->port.membase + UARTMODEM);  in lpuart_set_termios()
1332 	writeb(old_cr2, sport->port.membase + UARTCR2);  in lpuart_set_termios()
1543 	writeb(ch, port->membase + UARTDR);  in lpuart_console_putchar()
1564 	writeb(cr2, sport->port.membase + UARTCR2);  in lpuart_console_write()
1572 	writeb(old_cr2, sport->port.membase + UARTCR2);  in lpuart_console_write()
1876 		writeb(temp, sport->port.membase + UARTCR2);  in lpuart_suspend()
1899 		writeb(temp, sport->port.membase + UARTCR2);  in lpuart_resume()