Lines Matching refs:UART011_DMACR
428 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_callback()
542 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_refill()
578 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_irq()
604 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_stop()
637 uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
648 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
665 writew(dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
693 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_flush_buffer()
733 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_trigger_dma()
844 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_irq()
925 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_stop()
1031 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_startup()
1070 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_shutdown()