Lines Matching refs:writeb
402 writeb(0x10, p + OCT_REG_CR_OFF); in sbs_init()
404 writeb(0x0, p + OCT_REG_CR_OFF); in sbs_init()
407 writeb(0x4, p + OCT_REG_CR_OFF); in sbs_init()
424 writeb(0, p + OCT_REG_CR_OFF); in sbs_exit()
766 writeb(readb(p + offset + NI8430_PORTCON) | NI8430_PORTCON_TXVR_ENABLE, in pci_ni8430_setup()
1860 writeb(0x00, p + 0x8f); /*MPIOINT[7:0]*/ in pci_xr17v35x_setup()
1861 writeb(0x00, p + 0x90); /*MPIOLVL[7:0]*/ in pci_xr17v35x_setup()
1862 writeb(0x00, p + 0x91); /*MPIO3T[7:0]*/ in pci_xr17v35x_setup()
1863 writeb(0x00, p + 0x92); /*MPIOINV[7:0]*/ in pci_xr17v35x_setup()
1864 writeb(0x00, p + 0x93); /*MPIOSEL[7:0]*/ in pci_xr17v35x_setup()
1865 writeb(0x00, p + 0x94); /*MPIOOD[7:0]*/ in pci_xr17v35x_setup()
1866 writeb(0x00, p + 0x95); /*MPIOINT[15:8]*/ in pci_xr17v35x_setup()
1867 writeb(0x00, p + 0x96); /*MPIOLVL[15:8]*/ in pci_xr17v35x_setup()
1868 writeb(0x00, p + 0x97); /*MPIO3T[15:8]*/ in pci_xr17v35x_setup()
1869 writeb(0x00, p + 0x98); /*MPIOINV[15:8]*/ in pci_xr17v35x_setup()
1870 writeb(0x00, p + 0x99); /*MPIOSEL[15:8]*/ in pci_xr17v35x_setup()
1871 writeb(0x00, p + 0x9a); /*MPIOOD[15:8]*/ in pci_xr17v35x_setup()
1873 writeb(0x00, p + UART_EXAR_8XMODE); in pci_xr17v35x_setup()
1874 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR); in pci_xr17v35x_setup()
1875 writeb(128, p + UART_EXAR_TXTRG); in pci_xr17v35x_setup()
1876 writeb(128, p + UART_EXAR_RXTRG); in pci_xr17v35x_setup()
1907 writeb(0x78, p + 0x90); /* MPIOLVL[7:0] */ in pci_fastcom335_setup()
1908 writeb(0x00, p + 0x92); /* MPIOINV[7:0] */ in pci_fastcom335_setup()
1909 writeb(0x00, p + 0x93); /* MPIOSEL[7:0] */ in pci_fastcom335_setup()
1913 writeb(0x00, p + 0x90); /* MPIOLVL[7:0] */ in pci_fastcom335_setup()
1914 writeb(0xc0, p + 0x92); /* MPIOINV[7:0] */ in pci_fastcom335_setup()
1915 writeb(0xc0, p + 0x93); /* MPIOSEL[7:0] */ in pci_fastcom335_setup()
1918 writeb(0x00, p + 0x8f); /* MPIOINT[7:0] */ in pci_fastcom335_setup()
1919 writeb(0x00, p + 0x91); /* MPIO3T[7:0] */ in pci_fastcom335_setup()
1920 writeb(0x00, p + 0x94); /* MPIOOD[7:0] */ in pci_fastcom335_setup()
1922 writeb(0x00, p + UART_EXAR_8XMODE); in pci_fastcom335_setup()
1923 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR); in pci_fastcom335_setup()
1924 writeb(32, p + UART_EXAR_TXTRG); in pci_fastcom335_setup()
1925 writeb(32, p + UART_EXAR_RXTRG); in pci_fastcom335_setup()