296 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
299 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_enable_must_enchance_mode()
312 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
315 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_disable_must_enchance_mode()
328 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xon1_value()
331 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_set_must_xon1_value()
345 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xoff1_value()
348 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_set_must_xoff1_value()
362 	oldlcr = inb(info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
365 	efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);  in mxser_set_must_fifo_value()
381 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_enum_value()
384 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_set_must_enum_value()
399 	oldlcr = inb(baseio + UART_LCR);  in mxser_get_must_hardware_id()
402 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_get_must_hardware_id()
407 	*pId = inb(baseio + MOXA_MUST_HWID_REGISTER);  in mxser_get_must_hardware_id()
417 	oldlcr = inb(baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
420 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
432 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
435 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_enable_must_tx_software_flow_control()
448 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
451 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_disable_must_tx_software_flow_control()
463 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
466 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_enable_must_rx_software_flow_control()
479 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
482 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_disable_must_rx_software_flow_control()
497 	oldmcr = inb(io + UART_MCR);  in CheckIsMoxaMust()
500 	if ((hwid = inb(io + UART_MCR)) != 0) {  in CheckIsMoxaMust()
539 	status = inb(baseaddr + UART_MSR);  in mxser_get_msr()
553 	return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;  in mxser_carrier_raised()
563 		outb(inb(mp->ioaddr + UART_MCR) |  in mxser_dtr_rts()
566 		outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),  in mxser_dtr_rts()
608 	cval = inb(info->ioaddr + UART_LCR);  in mxser_set_baud()
719 			status = inb(info->ioaddr + UART_MSR);  in mxser_change_speed()
899 	if (inb(info->ioaddr + UART_LSR) == 0xff) {  in mxser_activate()
911 	(void) inb(info->ioaddr + UART_LSR);  in mxser_activate()
912 	(void) inb(info->ioaddr + UART_RX);  in mxser_activate()
913 	(void) inb(info->ioaddr + UART_IIR);  in mxser_activate()
914 	(void) inb(info->ioaddr + UART_MSR);  in mxser_activate()
935 	(void) inb(info->ioaddr + UART_LSR);  in mxser_activate()
936 	(void) inb(info->ioaddr + UART_RX);  in mxser_activate()
937 	(void) inb(info->ioaddr + UART_IIR);  in mxser_activate()
938 	(void) inb(info->ioaddr + UART_MSR);  in mxser_activate()
989 	(void) inb(info->ioaddr + UART_RX);  in mxser_shutdown_port()
1030 	fcr = inb(info->ioaddr + UART_FCR);  in mxser_flush_buffer()
1062 	while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {  in mxser_close_port()
1319 	status = inb(info->ioaddr + UART_LSR);  in mxser_get_lsr_info()
1340 	status = inb(info->ioaddr + UART_MSR);  in mxser_tiocmget()
1388 	(void)inb(port);  in mxser_program_mode()
1389 	(void)inb(port);  in mxser_program_mode()
1391 	(void)inb(port);  in mxser_program_mode()
1393 	id = inb(port + 1) & 0x1F;  in mxser_program_mode()
1402 		n = inb(port + 2);  in mxser_program_mode()
1427 		n = inb(port + 5);  in mxser_normal_mode()
1431 			(void)inb(port);  in mxser_normal_mode()
1469 		(void)inb(port);  in mxser_read_register()
1474 			if (inb(port) & CHIP_DI)  in mxser_read_register()
1533 				status = inb(ip->ioaddr + UART_MSR);  in mxser_ioctl_special()
1622 					opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);  in mxser_ioctl_special()
1698 			val = inb(info->opmode_ioaddr);  in mxser_ioctl()
1706 			opmode = inb(info->opmode_ioaddr) >> shiftbit;  in mxser_ioctl()
1759 		lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;  in mxser_ioctl()
1772 		mcr = inb(info->ioaddr + UART_MCR);  in mxser_ioctl()
2018 	while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {  in mxser_wait_until_sent()
2052 		outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,  in mxser_rs_break()
2055 		outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,  in mxser_rs_break()
2083 		gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);  in mxser_receive_chars()
2092 			ch = inb(port->ioaddr + UART_RX);  in mxser_receive_chars()
2104 		ch = inb(port->ioaddr + UART_RX);  in mxser_receive_chars()
2145 		*status = inb(port->ioaddr + UART_LSR);  in mxser_receive_chars()
2238 		irqbits = inb(brd->vector) & brd->vector_mask;  in mxser_interrupt()
2253 				iir = inb(port->ioaddr + UART_IIR);  in mxser_interrupt()
2262 					status = inb(port->ioaddr + UART_LSR);  in mxser_interrupt()
2264 					inb(port->ioaddr + UART_MSR);  in mxser_interrupt()
2269 				status = inb(port->ioaddr + UART_LSR);  in mxser_interrupt()
2295 				msr = inb(port->ioaddr + UART_MSR);  in mxser_interrupt()
2418 		outb(inb(info->ioaddr + UART_IER) & 0xf0,  in mxser_initbrd()
2525 	scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);  in mxser_get_ISA_conf()
2530 	scratch = inb(cap + UART_IIR);  in mxser_get_ISA_conf()