299 	cy_writeb(port->u.cyy.base_addr + (reg << card->bus_index), val);  in cyy_writeb()
378 	cy_writeb(ccr, cmd);  in __cyy_issue_cmd()
402 	cy_writeb(address + (Cy_ClrIntr << index), 0);  in detect_isa_irq()
411 	cy_writeb(address + (CyCAR << index), 0);  in detect_isa_irq()
414 	cy_writeb(address + (CyCAR << index), 0);  in detect_isa_irq()
415 	cy_writeb(address + (CySRER << index),  in detect_isa_irq()
428 	cy_writeb(address + (CyCAR << index), (save_xir & 0x3));  in detect_isa_irq()
429 	cy_writeb(address + (CySRER << index),  in detect_isa_irq()
431 	cy_writeb(address + (CyTIR << index), (save_xir & 0x3f));  in detect_isa_irq()
432 	cy_writeb(address + (CyCAR << index), (save_car));  in detect_isa_irq()
433 	cy_writeb(address + (Cy_ClrIntr << index), 0);  in detect_isa_irq()
587 	cy_writeb(base_addr + (CyCAR << index), save_xir);  in cyy_chip_tx()
816 	cy_writeb(card_base_addr + (Cy_ClrIntr << index), 0);  in cyy_interrupt()
1043 		cy_writeb(cinfo->base_addr + tx_bufaddr + tx_put, data);  in cyz_handle_tx()
1074 		cy_writeb(cinfo->base_addr + tx_bufaddr + tx_put, data);  in cyz_handle_tx()
3188 	cy_writeb(true_base_addr + (Cy_HwReset << index), 0);  in cyy_init_card()
3190 	cy_writeb(true_base_addr + (Cy_ClrIntr << index), 0);  in cyy_init_card()
3207 		cy_writeb(base_addr + (CyGFRCR << index), 0);  in cyy_init_card()
3222 		cy_writeb(base_addr + (CyCCR << index), CyCHIP_RESET);  in cyy_init_card()
3243 		cy_writeb(base_addr + (CyGCR << index), CyCH0_SERIAL);  in cyy_init_card()
3248 			cy_writeb(base_addr + (CyPPR << index), CyCLOCK_60_2MS);  in cyy_init_card()
3251 			cy_writeb(base_addr + (CyPPR << index), CyCLOCK_25_5MS);  in cyy_init_card()
3582 		cy_writeb(tmp, 255);  in cyz_load_fw()
3587 			cy_writeb(tmp, 255);  in cyz_load_fw()
3878 			cy_writeb(addr0 + 0x4c, 0x43);  in cy_pci_probe()
3925 		cy_writeb(cinfo->ctl_addr.p9050 + 0x4c, 0);  in cy_pci_remove()
4142 			cy_writeb(card->base_addr + Cy_ClrIntr, 0);  in cy_cleanup_module()