Lines Matching refs:base

145 	void __iomem *base;  member
183 data = readl(sspi->base + SIRFSOC_SPI_RXFIFO_DATA); in spi_sirfsoc_rx_word_u8()
203 writel(data, sspi->base + SIRFSOC_SPI_TXFIFO_DATA); in spi_sirfsoc_tx_word_u8()
212 data = readl(sspi->base + SIRFSOC_SPI_RXFIFO_DATA); in spi_sirfsoc_rx_word_u16()
232 writel(data, sspi->base + SIRFSOC_SPI_TXFIFO_DATA); in spi_sirfsoc_tx_word_u16()
241 data = readl(sspi->base + SIRFSOC_SPI_RXFIFO_DATA); in spi_sirfsoc_rx_word_u32()
262 writel(data, sspi->base + SIRFSOC_SPI_TXFIFO_DATA); in spi_sirfsoc_tx_word_u32()
269 u32 spi_stat = readl(sspi->base + SIRFSOC_SPI_INT_STATUS); in spi_sirfsoc_irq()
272 writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); in spi_sirfsoc_irq()
274 sspi->base + SIRFSOC_SPI_INT_STATUS); in spi_sirfsoc_irq()
283 writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); in spi_sirfsoc_irq()
285 sspi->base + SIRFSOC_SPI_INT_STATUS); in spi_sirfsoc_irq()
290 while (!(readl(sspi->base + SIRFSOC_SPI_INT_STATUS) & in spi_sirfsoc_irq()
294 writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); in spi_sirfsoc_irq()
296 sspi->base + SIRFSOC_SPI_INT_STATUS); in spi_sirfsoc_irq()
316 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_cmd_transfer()
317 writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_cmd_transfer()
325 writel(cmd, sspi->base + SIRFSOC_SPI_CMD); in spi_sirfsoc_cmd_transfer()
327 sspi->base + SIRFSOC_SPI_INT_EN); in spi_sirfsoc_cmd_transfer()
329 sspi->base + SIRFSOC_SPI_TX_RX_EN); in spi_sirfsoc_cmd_transfer()
345 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_dma_transfer()
346 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_dma_transfer()
347 writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_dma_transfer()
348 writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_dma_transfer()
349 writel(0, sspi->base + SIRFSOC_SPI_INT_EN); in spi_sirfsoc_dma_transfer()
350 writel(SIRFSOC_SPI_INT_MASK_ALL, sspi->base + SIRFSOC_SPI_INT_STATUS); in spi_sirfsoc_dma_transfer()
352 writel(readl(sspi->base + SIRFSOC_SPI_CTRL) | in spi_sirfsoc_dma_transfer()
354 sspi->base + SIRFSOC_SPI_CTRL); in spi_sirfsoc_dma_transfer()
356 sspi->base + SIRFSOC_SPI_TX_DMA_IO_LEN); in spi_sirfsoc_dma_transfer()
358 sspi->base + SIRFSOC_SPI_RX_DMA_IO_LEN); in spi_sirfsoc_dma_transfer()
360 writel(readl(sspi->base + SIRFSOC_SPI_CTRL), in spi_sirfsoc_dma_transfer()
361 sspi->base + SIRFSOC_SPI_CTRL); in spi_sirfsoc_dma_transfer()
362 writel(0, sspi->base + SIRFSOC_SPI_TX_DMA_IO_LEN); in spi_sirfsoc_dma_transfer()
363 writel(0, sspi->base + SIRFSOC_SPI_RX_DMA_IO_LEN); in spi_sirfsoc_dma_transfer()
388 sspi->base + SIRFSOC_SPI_TX_RX_EN); in spi_sirfsoc_dma_transfer()
406 writel(0, sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_dma_transfer()
407 writel(0, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_dma_transfer()
409 writel(0, sspi->base + SIRFSOC_SPI_TX_RX_EN); in spi_sirfsoc_dma_transfer()
421 sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_pio_transfer()
423 sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_pio_transfer()
425 sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_pio_transfer()
427 sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_pio_transfer()
428 writel(0, sspi->base + SIRFSOC_SPI_INT_EN); in spi_sirfsoc_pio_transfer()
430 sspi->base + SIRFSOC_SPI_INT_STATUS); in spi_sirfsoc_pio_transfer()
431 writel(readl(sspi->base + SIRFSOC_SPI_CTRL) | in spi_sirfsoc_pio_transfer()
433 sspi->base + SIRFSOC_SPI_CTRL); in spi_sirfsoc_pio_transfer()
435 - 1, sspi->base + SIRFSOC_SPI_TX_DMA_IO_LEN); in spi_sirfsoc_pio_transfer()
437 - 1, sspi->base + SIRFSOC_SPI_RX_DMA_IO_LEN); in spi_sirfsoc_pio_transfer()
438 while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) in spi_sirfsoc_pio_transfer()
445 sspi->base + SIRFSOC_SPI_INT_EN); in spi_sirfsoc_pio_transfer()
447 sspi->base + SIRFSOC_SPI_TX_RX_EN); in spi_sirfsoc_pio_transfer()
453 while (!((readl(sspi->base + SIRFSOC_SPI_RXFIFO_STATUS) in spi_sirfsoc_pio_transfer()
456 writel(0, sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_pio_transfer()
457 writel(0, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_pio_transfer()
491 u32 regval = readl(sspi->base + SIRFSOC_SPI_CTRL); in spi_sirfsoc_chipselect()
506 writel(regval, sspi->base + SIRFSOC_SPI_CTRL); in spi_sirfsoc_chipselect()
591 sspi->base + SIRFSOC_SPI_TXFIFO_LEVEL_CHK); in spi_sirfsoc_setup_transfer()
595 sspi->base + SIRFSOC_SPI_RXFIFO_LEVEL_CHK); in spi_sirfsoc_setup_transfer()
596 writel(txfifo_ctrl, sspi->base + SIRFSOC_SPI_TXFIFO_CTRL); in spi_sirfsoc_setup_transfer()
597 writel(rxfifo_ctrl, sspi->base + SIRFSOC_SPI_RXFIFO_CTRL); in spi_sirfsoc_setup_transfer()
612 writel(regval, sspi->base + SIRFSOC_SPI_CTRL); in spi_sirfsoc_setup_transfer()
616 writel(0, sspi->base + SIRFSOC_SPI_TX_DMA_IO_CTRL); in spi_sirfsoc_setup_transfer()
618 sspi->base + SIRFSOC_SPI_RX_DMA_IO_CTRL); in spi_sirfsoc_setup_transfer()
622 sspi->base + SIRFSOC_SPI_TX_DMA_IO_CTRL); in spi_sirfsoc_setup_transfer()
624 sspi->base + SIRFSOC_SPI_RX_DMA_IO_CTRL); in spi_sirfsoc_setup_transfer()
666 sspi->base = devm_ioremap_resource(&pdev->dev, mem_res); in spi_sirfsoc_probe()
667 if (IS_ERR(sspi->base)) { in spi_sirfsoc_probe()
668 ret = PTR_ERR(sspi->base); in spi_sirfsoc_probe()
719 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_probe()
720 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_probe()
721 writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_probe()
722 writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_probe()
724 writel(0, sspi->base + SIRFSOC_SPI_DUMMY_DELAY_CTL); in spi_sirfsoc_probe()
807 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_resume()
808 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_resume()
809 writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_RXFIFO_OP); in spi_sirfsoc_resume()
810 writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_TXFIFO_OP); in spi_sirfsoc_resume()