Lines Matching refs:DCSR
132 while (!(DCSR(channel) & DCSR_STOPSTATE) && --limit) in wait_dma_channel_stop()
142 DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL; in pxa2xx_spi_dma_error_stop()
143 DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL; in pxa2xx_spi_dma_error_stop()
171 DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL; in pxa2xx_spi_dma_transfer_complete()
172 DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL; in pxa2xx_spi_dma_transfer_complete()
211 u32 irq_status = DCSR(channel) & DMA_INT_MASK; in pxa2xx_spi_dma_handler()
252 && (DCSR(drv_data->tx_channel) & DCSR_RUN)) { in pxa2xx_spi_dma_transfer()
291 DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL; in pxa2xx_spi_dma_prepare()
308 DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL; in pxa2xx_spi_dma_prepare()
333 DCSR(drv_data->rx_channel) |= DCSR_RUN; in pxa2xx_spi_dma_start()
334 DCSR(drv_data->tx_channel) |= DCSR_RUN; in pxa2xx_spi_dma_start()