Lines Matching refs:reg_base
90 struct fsl_spi_reg *reg_base = mspi->reg_base; in fsl_spi_change_mode() local
91 __be32 __iomem *mode = ®_base->mode; in fsl_spi_change_mode()
292 struct fsl_spi_reg *reg_base = mspi->reg_base; in fsl_spi_cpu_bufs() local
297 mpc8xxx_spi_write_reg(®_base->mask, SPIM_NE); in fsl_spi_cpu_bufs()
301 mpc8xxx_spi_write_reg(®_base->transmit, word); in fsl_spi_cpu_bufs()
310 struct fsl_spi_reg *reg_base; in fsl_spi_bufs() local
315 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_bufs()
348 mpc8xxx_spi_write_reg(®_base->mask, 0); in fsl_spi_bufs()
425 struct fsl_spi_reg *reg_base; in fsl_spi_setup() local
441 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_setup()
444 cs->hw_mode = mpc8xxx_spi_read_reg(®_base->mode); in fsl_spi_setup()
510 struct fsl_spi_reg *reg_base = mspi->reg_base; in fsl_spi_cpu_irq() local
514 u32 rx_data = mpc8xxx_spi_read_reg(®_base->receive); in fsl_spi_cpu_irq()
523 mpc8xxx_spi_read_reg(®_base->event)) & in fsl_spi_cpu_irq()
528 mpc8xxx_spi_write_reg(®_base->event, events); in fsl_spi_cpu_irq()
534 mpc8xxx_spi_write_reg(®_base->transmit, word); in fsl_spi_cpu_irq()
545 struct fsl_spi_reg *reg_base = mspi->reg_base; in fsl_spi_irq() local
548 events = mpc8xxx_spi_read_reg(®_base->event); in fsl_spi_irq()
564 iounmap(mspi->reg_base); in fsl_spi_remove()
571 struct fsl_spi_reg *reg_base = mpc8xxx_spi->reg_base; in fsl_spi_grlib_cs_control() local
578 slvsel = mpc8xxx_spi_read_reg(®_base->slvsel); in fsl_spi_grlib_cs_control()
580 mpc8xxx_spi_write_reg(®_base->slvsel, slvsel); in fsl_spi_grlib_cs_control()
589 struct fsl_spi_reg *reg_base = mpc8xxx_spi->reg_base; in fsl_spi_grlib_probe() local
593 capabilities = mpc8xxx_spi_read_reg(®_base->cap); in fsl_spi_grlib_probe()
603 mpc8xxx_spi_write_reg(®_base->slvsel, 0xffffffff); in fsl_spi_grlib_probe()
615 struct fsl_spi_reg *reg_base; in fsl_spi_probe() local
642 mpc8xxx_spi->reg_base = ioremap(mem->start, resource_size(mem)); in fsl_spi_probe()
643 if (mpc8xxx_spi->reg_base == NULL) { in fsl_spi_probe()
670 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_probe()
673 mpc8xxx_spi_write_reg(®_base->mode, 0); in fsl_spi_probe()
674 mpc8xxx_spi_write_reg(®_base->mask, 0); in fsl_spi_probe()
675 mpc8xxx_spi_write_reg(®_base->command, 0); in fsl_spi_probe()
676 mpc8xxx_spi_write_reg(®_base->event, 0xffffffff); in fsl_spi_probe()
687 mpc8xxx_spi_write_reg(®_base->mode, regval); in fsl_spi_probe()
693 dev_info(dev, "at 0x%p (irq = %d), %s mode\n", reg_base, in fsl_spi_probe()
701 iounmap(mpc8xxx_spi->reg_base); in fsl_spi_probe()