92 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_change_mode()  local
93 	__be32 __iomem *mode = &reg_base->csmode[spi->chip_select];  in fsl_espi_change_mode()
94 	__be32 __iomem *espi_mode = &reg_base->mode;  in fsl_espi_change_mode()
203 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_cpu_bufs()  local
208 	mpc8xxx_spi_write_reg(&reg_base->mask, SPIM_NE);  in fsl_espi_cpu_bufs()
212 	mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_bufs()
220 	struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_bufs()  local
238 	mpc8xxx_spi_write_reg(&reg_base->command,  in fsl_espi_bufs()
248 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_bufs()
469 	struct fsl_espi_reg *reg_base;  in fsl_espi_setup()  local
486 	reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_setup()
490 			&reg_base->csmode[spi->chip_select]);  in fsl_espi_setup()
503 	loop_mode = mpc8xxx_spi_read_reg(&reg_base->mode);  in fsl_espi_setup()
507 	mpc8xxx_spi_write_reg(&reg_base->mode, loop_mode);  in fsl_espi_setup()
527 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_cpu_irq()  local
537 			events = mpc8xxx_spi_read_reg(&reg_base->event);  in fsl_espi_cpu_irq()
541 			rx_data = mpc8xxx_spi_read_reg(&reg_base->receive);  in fsl_espi_cpu_irq()
546 				rx_data_8 = in_8((u8 *)&reg_base->receive);  in fsl_espi_cpu_irq()
564 				&reg_base->event)) & SPIE_NF) == 0, 1000, 0);  in fsl_espi_cpu_irq()
572 	mpc8xxx_spi_write_reg(&reg_base->event, events);  in fsl_espi_cpu_irq()
578 		mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_irq()
587 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_irq()  local
592 	events = mpc8xxx_spi_read_reg(&reg_base->event);  in fsl_espi_irq()
605 	iounmap(mspi->reg_base);  in fsl_espi_remove()
611 	struct fsl_espi_reg *reg_base;  in fsl_espi_suspend()  local
615 	reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_suspend()
617 	regval = mpc8xxx_spi_read_reg(&reg_base->mode);  in fsl_espi_suspend()
619 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_suspend()
627 	struct fsl_espi_reg *reg_base;  in fsl_espi_resume()  local
631 	reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_resume()
633 	regval = mpc8xxx_spi_read_reg(&reg_base->mode);  in fsl_espi_resume()
635 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_resume()
646 	struct fsl_espi_reg *reg_base;  in fsl_espi_probe()  local
672 	mpc8xxx_spi->reg_base = ioremap(mem->start, resource_size(mem));  in fsl_espi_probe()
673 	if (!mpc8xxx_spi->reg_base) {  in fsl_espi_probe()
678 	reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_probe()
692 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in fsl_espi_probe()
693 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_probe()
694 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in fsl_espi_probe()
695 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in fsl_espi_probe()
720 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], csmode);  in fsl_espi_probe()
728 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_probe()
734 	dev_info(dev, "at 0x%p (irq = %d)\n", reg_base, mpc8xxx_spi->irq);  in fsl_espi_probe()
741 	iounmap(mpc8xxx_spi->reg_base);  in fsl_espi_probe()
831 	struct fsl_espi_reg *reg_base;  in of_fsl_espi_resume()  local
836 	reg_base = mpc8xxx_spi->reg_base;  in of_fsl_espi_resume()
839 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in of_fsl_espi_resume()
840 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in of_fsl_espi_resume()
841 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in of_fsl_espi_resume()
842 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in of_fsl_espi_resume()
846 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], CSMODE_INIT_VAL);  in of_fsl_espi_resume()
851 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in of_fsl_espi_resume()