Lines Matching refs:dws
56 struct dw_spi *dws = file->private_data; in dw_spi_show_regs() local
66 "%s registers:\n", dev_name(&dws->master->dev)); in dw_spi_show_regs()
70 "CTRL0: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL0)); in dw_spi_show_regs()
72 "CTRL1: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL1)); in dw_spi_show_regs()
74 "SSIENR: \t0x%08x\n", dw_readl(dws, DW_SPI_SSIENR)); in dw_spi_show_regs()
76 "SER: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SER)); in dw_spi_show_regs()
78 "BAUDR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_BAUDR)); in dw_spi_show_regs()
80 "TXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_TXFLTR)); in dw_spi_show_regs()
82 "RXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_RXFLTR)); in dw_spi_show_regs()
84 "TXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_TXFLR)); in dw_spi_show_regs()
86 "RXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_RXFLR)); in dw_spi_show_regs()
88 "SR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SR)); in dw_spi_show_regs()
90 "IMR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_IMR)); in dw_spi_show_regs()
92 "ISR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_ISR)); in dw_spi_show_regs()
94 "DMACR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_DMACR)); in dw_spi_show_regs()
96 "DMATDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMATDLR)); in dw_spi_show_regs()
98 "DMARDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMARDLR)); in dw_spi_show_regs()
114 static int dw_spi_debugfs_init(struct dw_spi *dws) in dw_spi_debugfs_init() argument
116 dws->debugfs = debugfs_create_dir("dw_spi", NULL); in dw_spi_debugfs_init()
117 if (!dws->debugfs) in dw_spi_debugfs_init()
121 dws->debugfs, (void *)dws, &dw_spi_regs_ops); in dw_spi_debugfs_init()
125 static void dw_spi_debugfs_remove(struct dw_spi *dws) in dw_spi_debugfs_remove() argument
127 debugfs_remove_recursive(dws->debugfs); in dw_spi_debugfs_remove()
131 static inline int dw_spi_debugfs_init(struct dw_spi *dws) in dw_spi_debugfs_init() argument
136 static inline void dw_spi_debugfs_remove(struct dw_spi *dws) in dw_spi_debugfs_remove() argument
143 struct dw_spi *dws = spi_master_get_devdata(spi->master); in dw_spi_set_cs() local
151 dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select)); in dw_spi_set_cs()
155 static inline u32 tx_max(struct dw_spi *dws) in tx_max() argument
159 tx_left = (dws->tx_end - dws->tx) / dws->n_bytes; in tx_max()
160 tx_room = dws->fifo_len - dw_readl(dws, DW_SPI_TXFLR); in tx_max()
170 rxtx_gap = ((dws->rx_end - dws->rx) - (dws->tx_end - dws->tx)) in tx_max()
171 / dws->n_bytes; in tx_max()
173 return min3(tx_left, tx_room, (u32) (dws->fifo_len - rxtx_gap)); in tx_max()
177 static inline u32 rx_max(struct dw_spi *dws) in rx_max() argument
179 u32 rx_left = (dws->rx_end - dws->rx) / dws->n_bytes; in rx_max()
181 return min_t(u32, rx_left, dw_readl(dws, DW_SPI_RXFLR)); in rx_max()
184 static void dw_writer(struct dw_spi *dws) in dw_writer() argument
186 u32 max = tx_max(dws); in dw_writer()
191 if (dws->tx_end - dws->len) { in dw_writer()
192 if (dws->n_bytes == 1) in dw_writer()
193 txw = *(u8 *)(dws->tx); in dw_writer()
195 txw = *(u16 *)(dws->tx); in dw_writer()
197 dw_write_io_reg(dws, DW_SPI_DR, txw); in dw_writer()
198 dws->tx += dws->n_bytes; in dw_writer()
202 static void dw_reader(struct dw_spi *dws) in dw_reader() argument
204 u32 max = rx_max(dws); in dw_reader()
208 rxw = dw_read_io_reg(dws, DW_SPI_DR); in dw_reader()
210 if (dws->rx_end - dws->len) { in dw_reader()
211 if (dws->n_bytes == 1) in dw_reader()
212 *(u8 *)(dws->rx) = rxw; in dw_reader()
214 *(u16 *)(dws->rx) = rxw; in dw_reader()
216 dws->rx += dws->n_bytes; in dw_reader()
220 static void int_error_stop(struct dw_spi *dws, const char *msg) in int_error_stop() argument
222 spi_reset_chip(dws); in int_error_stop()
224 dev_err(&dws->master->dev, "%s\n", msg); in int_error_stop()
225 dws->master->cur_msg->status = -EIO; in int_error_stop()
226 spi_finalize_current_transfer(dws->master); in int_error_stop()
229 static irqreturn_t interrupt_transfer(struct dw_spi *dws) in interrupt_transfer() argument
231 u16 irq_status = dw_readl(dws, DW_SPI_ISR); in interrupt_transfer()
235 dw_readl(dws, DW_SPI_ICR); in interrupt_transfer()
236 int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun"); in interrupt_transfer()
240 dw_reader(dws); in interrupt_transfer()
241 if (dws->rx_end == dws->rx) { in interrupt_transfer()
242 spi_mask_intr(dws, SPI_INT_TXEI); in interrupt_transfer()
243 spi_finalize_current_transfer(dws->master); in interrupt_transfer()
247 spi_mask_intr(dws, SPI_INT_TXEI); in interrupt_transfer()
248 dw_writer(dws); in interrupt_transfer()
250 spi_umask_intr(dws, SPI_INT_TXEI); in interrupt_transfer()
259 struct dw_spi *dws = spi_master_get_devdata(master); in dw_spi_irq() local
260 u16 irq_status = dw_readl(dws, DW_SPI_ISR) & 0x3f; in dw_spi_irq()
266 spi_mask_intr(dws, SPI_INT_TXEI); in dw_spi_irq()
270 return dws->transfer_handler(dws); in dw_spi_irq()
274 static int poll_transfer(struct dw_spi *dws) in poll_transfer() argument
277 dw_writer(dws); in poll_transfer()
278 dw_reader(dws); in poll_transfer()
280 } while (dws->rx_end > dws->rx); in poll_transfer()
288 struct dw_spi *dws = spi_master_get_devdata(master); in dw_spi_transfer_one() local
297 dws->dma_mapped = 0; in dw_spi_transfer_one()
298 dws->n_bytes = chip->n_bytes; in dw_spi_transfer_one()
299 dws->dma_width = chip->dma_width; in dw_spi_transfer_one()
301 dws->tx = (void *)transfer->tx_buf; in dw_spi_transfer_one()
302 dws->tx_end = dws->tx + transfer->len; in dw_spi_transfer_one()
303 dws->rx = transfer->rx_buf; in dw_spi_transfer_one()
304 dws->rx_end = dws->rx + transfer->len; in dw_spi_transfer_one()
305 dws->len = transfer->len; in dw_spi_transfer_one()
307 spi_enable_chip(dws, 0); in dw_spi_transfer_one()
319 clk_div = (dws->max_freq / speed + 1) & 0xfffe; in dw_spi_transfer_one()
324 spi_set_clk(dws, chip->clk_div); in dw_spi_transfer_one()
329 dws->n_bytes = 1; in dw_spi_transfer_one()
330 dws->dma_width = 1; in dw_spi_transfer_one()
332 dws->n_bytes = 2; in dw_spi_transfer_one()
333 dws->dma_width = 2; in dw_spi_transfer_one()
346 if (dws->rx && dws->tx) in dw_spi_transfer_one()
348 else if (dws->rx) in dw_spi_transfer_one()
357 dw_writel(dws, DW_SPI_CTRL0, cr0); in dw_spi_transfer_one()
361 dws->dma_mapped = master->cur_msg_mapped; in dw_spi_transfer_one()
364 spi_mask_intr(dws, 0xff); in dw_spi_transfer_one()
370 if (dws->dma_mapped) { in dw_spi_transfer_one()
371 ret = dws->dma_ops->dma_setup(dws, transfer); in dw_spi_transfer_one()
373 spi_enable_chip(dws, 1); in dw_spi_transfer_one()
377 txlevel = min_t(u16, dws->fifo_len / 2, dws->len / dws->n_bytes); in dw_spi_transfer_one()
378 dw_writel(dws, DW_SPI_TXFLTR, txlevel); in dw_spi_transfer_one()
383 spi_umask_intr(dws, imask); in dw_spi_transfer_one()
385 dws->transfer_handler = interrupt_transfer; in dw_spi_transfer_one()
388 spi_enable_chip(dws, 1); in dw_spi_transfer_one()
390 if (dws->dma_mapped) { in dw_spi_transfer_one()
391 ret = dws->dma_ops->dma_transfer(dws, transfer); in dw_spi_transfer_one()
397 return poll_transfer(dws); in dw_spi_transfer_one()
405 struct dw_spi *dws = spi_master_get_devdata(master); in dw_spi_handle_err() local
407 if (dws->dma_mapped) in dw_spi_handle_err()
408 dws->dma_ops->dma_stop(dws); in dw_spi_handle_err()
410 spi_reset_chip(dws); in dw_spi_handle_err()
490 static void spi_hw_init(struct device *dev, struct dw_spi *dws) in spi_hw_init() argument
492 spi_reset_chip(dws); in spi_hw_init()
498 if (!dws->fifo_len) { in spi_hw_init()
502 dw_writel(dws, DW_SPI_TXFLTR, fifo); in spi_hw_init()
503 if (fifo != dw_readl(dws, DW_SPI_TXFLTR)) in spi_hw_init()
506 dw_writel(dws, DW_SPI_TXFLTR, 0); in spi_hw_init()
508 dws->fifo_len = (fifo == 1) ? 0 : fifo; in spi_hw_init()
509 dev_dbg(dev, "Detected FIFO size: %u bytes\n", dws->fifo_len); in spi_hw_init()
513 int dw_spi_add_host(struct device *dev, struct dw_spi *dws) in dw_spi_add_host() argument
518 BUG_ON(dws == NULL); in dw_spi_add_host()
524 dws->master = master; in dw_spi_add_host()
525 dws->type = SSI_MOTO_SPI; in dw_spi_add_host()
526 dws->dma_inited = 0; in dw_spi_add_host()
527 dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60); in dw_spi_add_host()
528 snprintf(dws->name, sizeof(dws->name), "dw_spi%d", dws->bus_num); in dw_spi_add_host()
530 ret = devm_request_irq(dev, dws->irq, dw_spi_irq, IRQF_SHARED, in dw_spi_add_host()
531 dws->name, master); in dw_spi_add_host()
539 master->bus_num = dws->bus_num; in dw_spi_add_host()
540 master->num_chipselect = dws->num_cs; in dw_spi_add_host()
546 master->max_speed_hz = dws->max_freq; in dw_spi_add_host()
550 spi_hw_init(dev, dws); in dw_spi_add_host()
552 if (dws->dma_ops && dws->dma_ops->dma_init) { in dw_spi_add_host()
553 ret = dws->dma_ops->dma_init(dws); in dw_spi_add_host()
556 dws->dma_inited = 0; in dw_spi_add_host()
558 master->can_dma = dws->dma_ops->can_dma; in dw_spi_add_host()
562 spi_master_set_devdata(master, dws); in dw_spi_add_host()
569 dw_spi_debugfs_init(dws); in dw_spi_add_host()
573 if (dws->dma_ops && dws->dma_ops->dma_exit) in dw_spi_add_host()
574 dws->dma_ops->dma_exit(dws); in dw_spi_add_host()
575 spi_enable_chip(dws, 0); in dw_spi_add_host()
582 void dw_spi_remove_host(struct dw_spi *dws) in dw_spi_remove_host() argument
584 if (!dws) in dw_spi_remove_host()
586 dw_spi_debugfs_remove(dws); in dw_spi_remove_host()
588 if (dws->dma_ops && dws->dma_ops->dma_exit) in dw_spi_remove_host()
589 dws->dma_ops->dma_exit(dws); in dw_spi_remove_host()
590 spi_enable_chip(dws, 0); in dw_spi_remove_host()
592 spi_set_clk(dws, 0); in dw_spi_remove_host()
596 int dw_spi_suspend_host(struct dw_spi *dws) in dw_spi_suspend_host() argument
600 ret = spi_master_suspend(dws->master); in dw_spi_suspend_host()
603 spi_enable_chip(dws, 0); in dw_spi_suspend_host()
604 spi_set_clk(dws, 0); in dw_spi_suspend_host()
609 int dw_spi_resume_host(struct dw_spi *dws) in dw_spi_resume_host() argument
613 spi_hw_init(&dws->master->dev, dws); in dw_spi_resume_host()
614 ret = spi_master_resume(dws->master); in dw_spi_resume_host()
616 dev_err(&dws->master->dev, "fail to start queue (%d)\n", ret); in dw_spi_resume_host()