Lines Matching refs:control
74 u32 control; member
84 u32 control; member
157 writel_relaxed(DMA_ENABLE, &chan->reg_chan->control); in chan_start()
179 writel_relaxed(v, &chan->reg_rx_flow->control); in chan_start()
211 writel_relaxed(DMA_TEARDOWN, &chan->reg_chan->control); in chan_teardown()
216 value = readl_relaxed(&chan->reg_chan->control); in chan_teardown()
221 if (readl_relaxed(&chan->reg_chan->control) & DMA_ENABLE) { in chan_teardown()
246 writel_relaxed(0, &chan->reg_rx_flow->control); in chan_stop()
263 writel_relaxed(DMA_ENABLE, &dma->reg_tx_chan[i].control); in dma_hw_enable_all()
288 writel_relaxed(DMA_ENABLE, &dma->reg_rx_chan[i].control); in knav_dma_hw_init()
305 writel_relaxed(v, &dma->reg_rx_chan[i].control); in knav_dma_hw_destroy()
308 writel_relaxed(v, &dma->reg_tx_chan[i].control); in knav_dma_hw_destroy()