66 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.intr_mask),  in qla4xxx_dump_registers()
67 		    readw(&ha->reg->u1.isp4022.intr_mask));  in qla4xxx_dump_registers()
69 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram),  in qla4xxx_dump_registers()
70 		    readw(&ha->reg->u1.isp4022.nvram));  in qla4xxx_dump_registers()
72 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.semaphore),  in qla4xxx_dump_registers()
73 		    readw(&ha->reg->u1.isp4022.semaphore));  in qla4xxx_dump_registers()
107 		    offsetof(struct isp_reg, u2.isp4022.p0.ext_hw_conf),  in qla4xxx_dump_registers()
108 		    readw(&ha->reg->u2.isp4022.p0.ext_hw_conf));  in qla4xxx_dump_registers()
110 		    offsetof(struct isp_reg, u2.isp4022.p0.port_ctrl),  in qla4xxx_dump_registers()
111 		    readw(&ha->reg->u2.isp4022.p0.port_ctrl));  in qla4xxx_dump_registers()
113 		    offsetof(struct isp_reg, u2.isp4022.p0.port_status),  in qla4xxx_dump_registers()
114 		    readw(&ha->reg->u2.isp4022.p0.port_status));  in qla4xxx_dump_registers()
116 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_out),  in qla4xxx_dump_registers()
117 		    readw(&ha->reg->u2.isp4022.p0.gp_out));  in qla4xxx_dump_registers()
119 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in),  in qla4xxx_dump_registers()
120 		    readw(&ha->reg->u2.isp4022.p0.gp_in));  in qla4xxx_dump_registers()
122 		    offsetof(struct isp_reg, u2.isp4022.p0.port_err_status),  in qla4xxx_dump_registers()
123 		    readw(&ha->reg->u2.isp4022.p0.port_err_status));  in qla4xxx_dump_registers()
128 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p1.req_q_out),  in qla4xxx_dump_registers()
129 		    readw(&ha->reg->u2.isp4022.p1.req_q_out));  in qla4xxx_dump_registers()