433 	ib_rp_reg = ioread32(mhba->regs->inb_read_pointer);  in mvumi_check_ib_list_9143()
455 	count = ioread32(mhba->ib_shadow);  in mvumi_check_ib_list_9580()
522 		ob_write = ioread32(regs->outb_copy_pointer);  in mvumi_check_ob_list_9143()
523 		ob_write_shadow = ioread32(mhba->ob_shadow);  in mvumi_check_ob_list_9143()
542 	ob_write = ioread32(regs->outb_read_pointer);  in mvumi_check_ob_list_9580()
543 	ob_write = ioread32(regs->outb_copy_pointer);  in mvumi_check_ob_list_9580()
612 	if (ioread32(regs->arm_to_pciea_msg1) != HANDSHAKE_DONESTATE)  in mvumi_reset()
639 	tmp = ioread32(regs->arm_to_pciea_msg1);  in mvumi_wait_for_fw()
650 		tmp = ioread32(regs->arm_to_pciea_msg1);  in mvumi_wait_for_fw()
1126 		tmp = ioread32(regs->arm_to_pciea_msg0);  in mvumi_handshake()
1200 		tmp = ioread32(regs->enpointa_mask_reg);  in mvumi_handshake()
1270 	tmp = ioread32(mhba->regs->arm_to_pciea_msg1);  in mvumi_check_handshake()
1282 		tmp = ioread32(mhba->regs->arm_to_pciea_msg1);  in mvumi_check_handshake()
1307 	tmp = ioread32(regs->arm_to_pciea_drbl_reg);  in mvumi_start()
1311 	tmp = ioread32(regs->enpointa_mask_reg) | regs->int_dl_cpu2pciea;  in mvumi_start()
1941 	mask = ioread32(regs->enpointa_mask_reg);  in mvumi_enable_intr()
1956 	mask = ioread32(regs->enpointa_mask_reg);  in mvumi_disable_intr()
1968 	status = ioread32(regs->main_int_cause_reg);  in mvumi_clear_intr()
1972 		tmp = ioread32(regs->outb_isr_cause);  in mvumi_clear_intr()
1988 		tmp = ioread32(regs->outb_isr_cause);  in mvumi_clear_intr()
1993 		isr_status = ioread32(regs->arm_to_pciea_drbl_reg);  in mvumi_clear_intr()
2012 	status = ioread32(mhba->regs->arm_to_pciea_drbl_reg);  in mvumi_read_fw_status_reg()