Lines Matching refs:uint8_t
398 uint8_t scsi_status; /* Standard SCSI status byte */
404 uint8_t scsi_status; /* SCSI status to give to initiator */
405 uint8_t target_phases; /* Bitmap of phases to execute */
406 uint8_t data_phase; /* Data-In or Data-Out */
407 uint8_t initiator_tag; /* Initiator's transaction tag */
423 uint8_t cdblen;
425 uint8_t cdb[MAX_CDB_LEN];
427 uint8_t cdb[MAX_CDB_LEN_WITH_SENSE_ADDR];
437 uint8_t scsi_status; /* SCSI status to give to initiator */
438 uint8_t target_phases; /* Bitmap of phases to execute */
439 uint8_t data_phase; /* Data-In or Data-Out */
440 uint8_t initiator_tag; /* Initiator's transaction tag */
491 /*18*/ uint8_t control; /* See SCB_CONTROL in aic79xx.reg for details */
492 /*19*/ uint8_t scsiid; /*
496 /*20*/ uint8_t lun;
497 /*21*/ uint8_t task_attribute;
498 /*22*/ uint8_t cdb_len;
499 /*23*/ uint8_t task_management;
506 /*48*/ uint8_t pkt_long_lun[8];
508 /*56*/ uint8_t spare[8];
543 uint8_t *vaddr;
618 uint8_t *sense_data;
666 uint8_t init_level; /*
678 uint8_t scsiid; /* Our ID and the initiator's ID */
679 uint8_t identify; /* Identify message */
680 uint8_t bytes[22]; /*
685 uint8_t cmd_valid; /*
696 uint8_t pad[7];
705 uint8_t initiator_id;
706 uint8_t event_type; /* MSG type or EVENT_TYPE_BUS_RESET */
708 uint8_t event_arg;
724 uint8_t event_r_idx;
725 uint8_t event_w_idx;
747 uint8_t protocol_version; /* SCSI Revision level */
748 uint8_t transport_version; /* SPI Revision level */
749 uint8_t width; /* Bus width */
750 uint8_t period; /* Sync rate factor */
751 uint8_t offset; /* Sync offset */
752 uint8_t ppr_options; /* Parallel Protocol Request options */
816 uint8_t phase;
817 uint8_t mesg_out; /* Message response to parity errors */
901 uint8_t bios_flags;
904 uint8_t reserved_1[21];
905 uint8_t resource_type;
906 uint8_t resource_len[2];
907 uint8_t resource_data[8];
908 uint8_t vpd_tag;
910 uint8_t vpd_keyword[2];
911 uint8_t length;
912 uint8_t revision;
913 uint8_t device_flags;
914 uint8_t termination_menus[2];
915 uint8_t fifo_threshold;
916 uint8_t end_tag;
917 uint8_t vpd_checksum;
921 uint8_t default_irq;
922 uint8_t pci_lattime;
923 uint8_t max_target;
924 uint8_t boot_lun;
926 uint8_t reserved_2;
927 uint8_t checksum;
928 uint8_t reserved_3[4];
997 uint8_t scsiseq;
998 uint8_t sxfrctl0;
999 uint8_t sxfrctl1;
1000 uint8_t simode0;
1001 uint8_t simode1;
1002 uint8_t seltimer;
1003 uint8_t seqctl;
1008 uint8_t command;
1009 uint8_t csize_lattime;
1015 uint8_t optionmode;
1016 uint8_t dscommand0;
1017 uint8_t dspcistatus;
1019 uint8_t crccontrol1;
1020 uint8_t scbbaddr;
1022 uint8_t dff_thrsh;
1023 uint8_t *scratch_ram;
1024 uint8_t *btt;
1047 typedef uint8_t ahd_mode_state;
1054 uint8_t sg_status;
1055 uint8_t valid_tag;
1161 uint8_t unpause;
1162 uint8_t pause;
1169 uint8_t *overrun_buf;
1178 uint8_t our_id;
1184 uint8_t tqinfifonext;
1190 uint8_t hs_mailbox;
1195 uint8_t send_msg_perror;
1198 uint8_t msgout_buf[12];/* Message we are sending */
1199 uint8_t msgin_buf[12];/* Message we are receiving */
1225 uint8_t iocell_opts[AHD_NUM_PER_DEV_ANNEXCOLS];
1376 uint8_t *value);