63 	*data = ioread32(priv->regs + offset);  in tsi721_lcread()
122 	rd_count = ioread32(regs + TSI721_DMAC_DRDCNT);  in tsi721_maint_dma()
138 	ioread32(regs + TSI721_DMAC_DWRCNT);  in tsi721_maint_dma()
142 	while ((ch_stat = ioread32(regs + TSI721_DMAC_STS))  in tsi721_maint_dma()
183 	swr_ptr = ioread32(regs + TSI721_DMAC_DSWP);  in tsi721_maint_dma()
253 	pw_stat = ioread32(priv->regs + TSI721_RIO_PW_RX_STAT);  in tsi721_pw_handler()
256 		pw_buf[0] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(0));  in tsi721_pw_handler()
257 		pw_buf[1] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(1));  in tsi721_pw_handler()
258 		pw_buf[2] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(2));  in tsi721_pw_handler()
259 		pw_buf[3] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(3));  in tsi721_pw_handler()
323 	rval = ioread32(priv->regs + TSI721_RIO_EM_INT_ENABLE);  in tsi721_pw_enable()
379 	regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));  in tsi721_dbell_handler()
409 	wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;  in tsi721_db_dpc()
410 	rd_ptr = ioread32(priv->regs + TSI721_IDQ_RP(IDB_QUEUE)) % IDB_QSIZE;  in tsi721_db_dpc()
439 		wr_ptr = ioread32(priv->regs +  in tsi721_db_dpc()
447 	regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));  in tsi721_db_dpc()
452 	wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;  in tsi721_db_dpc()
478 	dev_int = ioread32(priv->regs + TSI721_DEV_INT);  in tsi721_irqhandler()
482 	dev_ch_int = ioread32(priv->regs + TSI721_DEV_CHAN_INT);  in tsi721_irqhandler()
488 			intval = ioread32(priv->regs +  in tsi721_irqhandler()
499 			ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_irqhandler()
512 			ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
528 			ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
546 		intval = ioread32(priv->regs + TSI721_RIO_EM_INT_STAT);  in tsi721_irqhandler()
609 	ioread32(priv->regs + TSI721_DEV_INTE);  in tsi721_interrupts_init()
660 	srio_int = ioread32(priv->regs + TSI721_RIO_EM_INT_STAT);  in tsi721_srio_msix()
682 	sr_ch_int = ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_sr2pc_ch_msix()
689 	sr_ch_int = ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_sr2pc_ch_msix()
897 		regval = ioread32(priv->regs + TSI721_IBWIN_LB(i));  in tsi721_rio_map_inb_mem()
940 		regval = ioread32(priv->regs + TSI721_IBWIN_LB(i));  in tsi721_rio_unmap_inb_mem()
942 			regval = ioread32(priv->regs + TSI721_IBWIN_TUA(i));  in tsi721_rio_unmap_inb_mem()
944 			regval = ioread32(priv->regs + TSI721_IBWIN_TLA(i));  in tsi721_rio_unmap_inb_mem()
1129 	ioread32(regs + TSI721_DMAC_INT);  in tsi721_bdma_maint_init()
1133 	ioread32(regs + TSI721_DMAC_CTL);  in tsi721_bdma_maint_init()
1149 	ch_stat = ioread32(regs + TSI721_DMAC_STS);  in tsi721_bdma_maint_free()
1184 	rval = ioread32(priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_enable()
1195 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_enable()
1214 	rval = ioread32(priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_disable()
1226 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1245 	rval = ioread32(priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_enable()
1256 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_enable()
1275 	rval = ioread32(priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_disable()
1287 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1349 	ioread32(priv->regs + TSI721_OBDMAC_DWRCNT(mbox));  in tsi721_add_outb_message()
1367 	omsg_int = ioread32(priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_handler()
1446 			ioread32(priv->regs + TSI721_OBDMAC_STS(ch)));  in tsi721_omsg_handler()
1452 		ioread32(priv->regs + TSI721_OBDMAC_CTL(ch));  in tsi721_omsg_handler()
1462 		ioread32(priv->regs + TSI721_OBDMAC_DRDCNT(ch));  in tsi721_omsg_handler()
1474 		ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
1625 	ioread32(priv->regs + TSI721_OBDMAC_DWRCNT(mbox));  in tsi721_open_outb_mbox()
1737 	imsg_int = ioread32(priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_handler()
1764 		ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
1927 	ioread32(priv->regs + TSI721_IBDMAC_CTL(ch));  in tsi721_open_inb_mbox()
2292 	iowrite32(ioread32(priv->regs + TSI721_DEVCTL) |  in tsi721_setup_mport()