92 static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)  in pmic_gpio_direction_input()  argument
94 	if (offset >= 8) {  in pmic_gpio_direction_input()
98 	return intel_scu_ipc_update_register(GPIO0 + offset,  in pmic_gpio_direction_input()
103 			unsigned offset, int value)  in pmic_gpio_direction_output()  argument
107 	if (offset < 8)/* it is GPIO */  in pmic_gpio_direction_output()
108 		rc = intel_scu_ipc_update_register(GPIO0 + offset,  in pmic_gpio_direction_output()
111 	else if (offset < 16)/* it is GPOSW */  in pmic_gpio_direction_output()
112 		rc = intel_scu_ipc_update_register(GPOSWCTL0 + offset - 8,  in pmic_gpio_direction_output()
115 	else if (offset > 15 && offset < 24)/* it is GPO */  in pmic_gpio_direction_output()
117 				value ? 1 << (offset - 16) : 0,  in pmic_gpio_direction_output()
118 				1 << (offset - 16));  in pmic_gpio_direction_output()
120 		pr_err("invalid PMIC GPIO pin %d!\n", offset);  in pmic_gpio_direction_output()
127 static int pmic_gpio_get(struct gpio_chip *chip, unsigned offset)  in pmic_gpio_get()  argument
133 	if (offset >= 8)  in pmic_gpio_get()
135 	ret = intel_scu_ipc_ioread8(GPIO0 + offset, &r);  in pmic_gpio_get()
141 static void pmic_gpio_set(struct gpio_chip *chip, unsigned offset, int value)  in pmic_gpio_set()  argument
143 	if (offset < 8)/* it is GPIO */  in pmic_gpio_set()
144 		intel_scu_ipc_update_register(GPIO0 + offset,  in pmic_gpio_set()
147 	else if (offset < 16)/* it is GPOSW */  in pmic_gpio_set()
148 		intel_scu_ipc_update_register(GPOSWCTL0 + offset - 8,  in pmic_gpio_set()
151 	else if (offset > 15 && offset < 24) /* it is GPO */  in pmic_gpio_set()
153 			value ? 1 << (offset - 16) : 0,  in pmic_gpio_set()
154 			1 << (offset - 16));  in pmic_gpio_set()
175 static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset)  in pmic_gpio_to_irq()  argument
179 	return pg->irq_base + offset;  in pmic_gpio_to_irq()