57 	struct pinctrl_dev *pctrl;  member
78 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_groups_count()  local
80 	return pctrl->soc->ngroups;  in msm_get_groups_count()
86 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_group_name()  local
88 	return pctrl->soc->groups[group].name;  in msm_get_group_name()
96 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_group_pins()  local
98 	*pins = pctrl->soc->groups[group].pins;  in msm_get_group_pins()
99 	*num_pins = pctrl->soc->groups[group].npins;  in msm_get_group_pins()
113 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_functions_count()  local
115 	return pctrl->soc->nfunctions;  in msm_get_functions_count()
121 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_function_name()  local
123 	return pctrl->soc->functions[function].name;  in msm_get_function_name()
131 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_function_groups()  local
133 	*groups = pctrl->soc->functions[function].groups;  in msm_get_function_groups()
134 	*num_groups = pctrl->soc->functions[function].ngroups;  in msm_get_function_groups()
142 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_pinmux_set_mux()  local
148 	g = &pctrl->soc->groups[group];  in msm_pinmux_set_mux()
158 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_pinmux_set_mux()
160 	val = readl(pctrl->regs + g->ctl_reg);  in msm_pinmux_set_mux()
163 	writel(val, pctrl->regs + g->ctl_reg);  in msm_pinmux_set_mux()
165 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_pinmux_set_mux()
177 static int msm_config_reg(struct msm_pinctrl *pctrl,  in msm_config_reg()  argument
222 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_config_group_get()  local
230 	g = &pctrl->soc->groups[group];  in msm_config_group_get()
232 	ret = msm_config_reg(pctrl, g, param, &mask, &bit);  in msm_config_group_get()
236 	val = readl(pctrl->regs + g->ctl_reg);  in msm_config_group_get()
261 		val = readl(pctrl->regs + g->io_reg);  in msm_config_group_get()
285 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_config_group_set()  local
295 	g = &pctrl->soc->groups[group];  in msm_config_group_set()
301 		ret = msm_config_reg(pctrl, g, param, &mask, &bit);  in msm_config_group_set()
328 			spin_lock_irqsave(&pctrl->lock, flags);  in msm_config_group_set()
329 			val = readl(pctrl->regs + g->io_reg);  in msm_config_group_set()
334 			writel(val, pctrl->regs + g->io_reg);  in msm_config_group_set()
335 			spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_config_group_set()
345 			dev_err(pctrl->dev, "Unsupported config parameter: %x\n",  in msm_config_group_set()
352 			dev_err(pctrl->dev, "config %x: %x is invalid\n", param, arg);  in msm_config_group_set()
356 		spin_lock_irqsave(&pctrl->lock, flags);  in msm_config_group_set()
357 		val = readl(pctrl->regs + g->ctl_reg);  in msm_config_group_set()
360 		writel(val, pctrl->regs + g->ctl_reg);  in msm_config_group_set()
361 		spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_config_group_set()
383 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_direction_input()  local
387 	g = &pctrl->soc->groups[offset];  in msm_gpio_direction_input()
389 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_direction_input()
391 	val = readl(pctrl->regs + g->ctl_reg);  in msm_gpio_direction_input()
393 	writel(val, pctrl->regs + g->ctl_reg);  in msm_gpio_direction_input()
395 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_direction_input()
403 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_direction_output()  local
407 	g = &pctrl->soc->groups[offset];  in msm_gpio_direction_output()
409 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_direction_output()
411 	val = readl(pctrl->regs + g->io_reg);  in msm_gpio_direction_output()
416 	writel(val, pctrl->regs + g->io_reg);  in msm_gpio_direction_output()
418 	val = readl(pctrl->regs + g->ctl_reg);  in msm_gpio_direction_output()
420 	writel(val, pctrl->regs + g->ctl_reg);  in msm_gpio_direction_output()
422 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_direction_output()
430 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_get()  local
433 	g = &pctrl->soc->groups[offset];  in msm_gpio_get()
435 	val = readl(pctrl->regs + g->io_reg);  in msm_gpio_get()
442 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_set()  local
446 	g = &pctrl->soc->groups[offset];  in msm_gpio_set()
448 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_set()
450 	val = readl(pctrl->regs + g->io_reg);  in msm_gpio_set()
455 	writel(val, pctrl->regs + g->io_reg);  in msm_gpio_set()
457 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_set()
482 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_dbg_show_one()  local
496 	g = &pctrl->soc->groups[offset];  in msm_gpio_dbg_show_one()
497 	ctl_reg = readl(pctrl->regs + g->ctl_reg);  in msm_gpio_dbg_show_one()
554 static void msm_gpio_update_dual_edge_pos(struct msm_pinctrl *pctrl,  in msm_gpio_update_dual_edge_pos()  argument
563 		val = readl(pctrl->regs + g->io_reg) & BIT(g->in_bit);  in msm_gpio_update_dual_edge_pos()
565 		pol = readl(pctrl->regs + g->intr_cfg_reg);  in msm_gpio_update_dual_edge_pos()
567 		writel(pol, pctrl->regs + g->intr_cfg_reg);  in msm_gpio_update_dual_edge_pos()
569 		val2 = readl(pctrl->regs + g->io_reg) & BIT(g->in_bit);  in msm_gpio_update_dual_edge_pos()
570 		intstat = readl(pctrl->regs + g->intr_status_reg);  in msm_gpio_update_dual_edge_pos()
574 	dev_err(pctrl->dev, "dual-edge irq failed to stabilize, %#08x != %#08x\n",  in msm_gpio_update_dual_edge_pos()
581 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_mask()  local
586 	g = &pctrl->soc->groups[d->hwirq];  in msm_gpio_irq_mask()
588 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_mask()
590 	val = readl(pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_mask()
592 	writel(val, pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_mask()
594 	clear_bit(d->hwirq, pctrl->enabled_irqs);  in msm_gpio_irq_mask()
596 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_mask()
602 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_unmask()  local
607 	g = &pctrl->soc->groups[d->hwirq];  in msm_gpio_irq_unmask()
609 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_unmask()
611 	val = readl(pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_unmask()
613 	writel(val, pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_unmask()
615 	val = readl(pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_unmask()
617 	writel(val, pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_unmask()
619 	set_bit(d->hwirq, pctrl->enabled_irqs);  in msm_gpio_irq_unmask()
621 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_unmask()
627 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_ack()  local
632 	g = &pctrl->soc->groups[d->hwirq];  in msm_gpio_irq_ack()
634 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_ack()
636 	val = readl(pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_ack()
641 	writel(val, pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_ack()
643 	if (test_bit(d->hwirq, pctrl->dual_edge_irqs))  in msm_gpio_irq_ack()
644 		msm_gpio_update_dual_edge_pos(pctrl, g, d);  in msm_gpio_irq_ack()
646 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_ack()
652 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_set_type()  local
657 	g = &pctrl->soc->groups[d->hwirq];  in msm_gpio_irq_set_type()
659 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_set_type()
665 		set_bit(d->hwirq, pctrl->dual_edge_irqs);  in msm_gpio_irq_set_type()
667 		clear_bit(d->hwirq, pctrl->dual_edge_irqs);  in msm_gpio_irq_set_type()
670 	val = readl(pctrl->regs + g->intr_target_reg);  in msm_gpio_irq_set_type()
673 	writel(val, pctrl->regs + g->intr_target_reg);  in msm_gpio_irq_set_type()
680 	val = readl(pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_set_type()
728 	writel(val, pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_set_type()
730 	if (test_bit(d->hwirq, pctrl->dual_edge_irqs))  in msm_gpio_irq_set_type()
731 		msm_gpio_update_dual_edge_pos(pctrl, g, d);  in msm_gpio_irq_set_type()
733 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_set_type()
746 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_set_wake()  local
749 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_set_wake()
751 	irq_set_irq_wake(pctrl->irq, on);  in msm_gpio_irq_set_wake()
753 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_set_wake()
771 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_handler()  local
784 	for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) {  in msm_gpio_irq_handler()
785 		g = &pctrl->soc->groups[i];  in msm_gpio_irq_handler()
786 		val = readl(pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_handler()
801 static int msm_gpio_init(struct msm_pinctrl *pctrl)  in msm_gpio_init()  argument
805 	unsigned ngpio = pctrl->soc->ngpios;  in msm_gpio_init()
810 	chip = &pctrl->chip;  in msm_gpio_init()
813 	chip->label = dev_name(pctrl->dev);  in msm_gpio_init()
814 	chip->dev = pctrl->dev;  in msm_gpio_init()
816 	chip->of_node = pctrl->dev->of_node;  in msm_gpio_init()
818 	ret = gpiochip_add(&pctrl->chip);  in msm_gpio_init()
820 		dev_err(pctrl->dev, "Failed register gpiochip\n");  in msm_gpio_init()
824 	ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), 0, 0, chip->ngpio);  in msm_gpio_init()
826 		dev_err(pctrl->dev, "Failed to add pin range\n");  in msm_gpio_init()
827 		gpiochip_remove(&pctrl->chip);  in msm_gpio_init()
837 		dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n");  in msm_gpio_init()
838 		gpiochip_remove(&pctrl->chip);  in msm_gpio_init()
842 	gpiochip_set_chained_irqchip(chip, &msm_gpio_irq_chip, pctrl->irq,  in msm_gpio_init()
851 	struct msm_pinctrl *pctrl = container_of(nb, struct msm_pinctrl, restart_nb);  in msm_ps_hold_restart()  local
853 	writel(0, pctrl->regs + PS_HOLD_OFFSET);  in msm_ps_hold_restart()
858 static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl)  in msm_pinctrl_setup_pm_reset()  argument
861 	const struct msm_function *func = pctrl->soc->functions;  in msm_pinctrl_setup_pm_reset()
863 	for (i = 0; i < pctrl->soc->nfunctions; i++)  in msm_pinctrl_setup_pm_reset()
865 			pctrl->restart_nb.notifier_call = msm_ps_hold_restart;  in msm_pinctrl_setup_pm_reset()
866 			pctrl->restart_nb.priority = 128;  in msm_pinctrl_setup_pm_reset()
867 			if (register_restart_handler(&pctrl->restart_nb))  in msm_pinctrl_setup_pm_reset()
868 				dev_err(pctrl->dev,  in msm_pinctrl_setup_pm_reset()
877 	struct msm_pinctrl *pctrl;  in msm_pinctrl_probe()  local
881 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in msm_pinctrl_probe()
882 	if (!pctrl) {  in msm_pinctrl_probe()
886 	pctrl->dev = &pdev->dev;  in msm_pinctrl_probe()
887 	pctrl->soc = soc_data;  in msm_pinctrl_probe()
888 	pctrl->chip = msm_gpio_template;  in msm_pinctrl_probe()
890 	spin_lock_init(&pctrl->lock);  in msm_pinctrl_probe()
893 	pctrl->regs = devm_ioremap_resource(&pdev->dev, res);  in msm_pinctrl_probe()
894 	if (IS_ERR(pctrl->regs))  in msm_pinctrl_probe()
895 		return PTR_ERR(pctrl->regs);  in msm_pinctrl_probe()
897 	msm_pinctrl_setup_pm_reset(pctrl);  in msm_pinctrl_probe()
899 	pctrl->irq = platform_get_irq(pdev, 0);  in msm_pinctrl_probe()
900 	if (pctrl->irq < 0) {  in msm_pinctrl_probe()
902 		return pctrl->irq;  in msm_pinctrl_probe()
906 	msm_pinctrl_desc.pins = pctrl->soc->pins;  in msm_pinctrl_probe()
907 	msm_pinctrl_desc.npins = pctrl->soc->npins;  in msm_pinctrl_probe()
908 	pctrl->pctrl = pinctrl_register(&msm_pinctrl_desc, &pdev->dev, pctrl);  in msm_pinctrl_probe()
909 	if (!pctrl->pctrl) {  in msm_pinctrl_probe()
914 	ret = msm_gpio_init(pctrl);  in msm_pinctrl_probe()
916 		pinctrl_unregister(pctrl->pctrl);  in msm_pinctrl_probe()
920 	platform_set_drvdata(pdev, pctrl);  in msm_pinctrl_probe()
930 	struct msm_pinctrl *pctrl = platform_get_drvdata(pdev);  in msm_pinctrl_remove()  local
932 	gpiochip_remove(&pctrl->chip);  in msm_pinctrl_remove()
933 	pinctrl_unregister(pctrl->pctrl);  in msm_pinctrl_remove()
935 	unregister_restart_handler(&pctrl->restart_nb);  in msm_pinctrl_remove()