Lines Matching refs:offset
220 static int u300_gpio_request(struct gpio_chip *chip, unsigned offset) in u300_gpio_request() argument
226 int gpio = chip->base + offset; in u300_gpio_request()
231 static void u300_gpio_free(struct gpio_chip *chip, unsigned offset) in u300_gpio_free() argument
233 int gpio = chip->base + offset; in u300_gpio_free()
238 static int u300_gpio_get(struct gpio_chip *chip, unsigned offset) in u300_gpio_get() argument
242 return readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset); in u300_gpio_get()
245 static void u300_gpio_set(struct gpio_chip *chip, unsigned offset, int value) in u300_gpio_set() argument
253 val = readl(U300_PIN_REG(offset, dor)); in u300_gpio_set()
255 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor)); in u300_gpio_set()
257 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor)); in u300_gpio_set()
262 static int u300_gpio_direction_input(struct gpio_chip *chip, unsigned offset) in u300_gpio_direction_input() argument
269 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_direction_input()
271 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); in u300_gpio_direction_input()
272 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_direction_input()
277 static int u300_gpio_direction_output(struct gpio_chip *chip, unsigned offset, in u300_gpio_direction_output() argument
286 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_direction_output()
292 ((offset & 0x07) << 1)); in u300_gpio_direction_output()
296 ((offset & 0x07) << 1)); in u300_gpio_direction_output()
298 << ((offset & 0x07) << 1)); in u300_gpio_direction_output()
299 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_direction_output()
301 u300_gpio_set(chip, offset, value); in u300_gpio_direction_output()
308 unsigned offset, in u300_gpio_config_get() argument
317 biasmode = !!(readl(U300_PIN_REG(offset, per)) & U300_PIN_BIT(offset)); in u300_gpio_config_get()
320 drmode = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_get()
321 drmode &= (U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); in u300_gpio_config_get()
322 drmode >>= ((offset & 0x07) << 1); in u300_gpio_config_get()
366 int u300_gpio_config_set(struct gpio_chip *chip, unsigned offset, in u300_gpio_config_set() argument
377 val = readl(U300_PIN_REG(offset, per)); in u300_gpio_config_set()
378 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); in u300_gpio_config_set()
381 val = readl(U300_PIN_REG(offset, per)); in u300_gpio_config_set()
382 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); in u300_gpio_config_set()
385 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
387 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
389 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
390 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
393 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
395 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
397 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
398 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
401 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
403 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
405 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
406 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
428 static void u300_toggle_trigger(struct u300_gpio *gpio, unsigned offset) in u300_toggle_trigger() argument
432 val = readl(U300_PIN_REG(offset, icr)); in u300_toggle_trigger()
434 if (u300_gpio_get(&gpio->chip, offset)) { in u300_toggle_trigger()
436 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); in u300_toggle_trigger()
438 offset); in u300_toggle_trigger()
441 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); in u300_toggle_trigger()
443 offset); in u300_toggle_trigger()
452 int offset = d->hwirq; in u300_gpio_irq_type() local
464 offset); in u300_gpio_irq_type()
465 port->toggle_edge_mode |= U300_PIN_BIT(offset); in u300_gpio_irq_type()
466 u300_toggle_trigger(gpio, offset); in u300_gpio_irq_type()
469 offset); in u300_gpio_irq_type()
470 val = readl(U300_PIN_REG(offset, icr)); in u300_gpio_irq_type()
471 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); in u300_gpio_irq_type()
472 port->toggle_edge_mode &= ~U300_PIN_BIT(offset); in u300_gpio_irq_type()
475 offset); in u300_gpio_irq_type()
476 val = readl(U300_PIN_REG(offset, icr)); in u300_gpio_irq_type()
477 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); in u300_gpio_irq_type()
478 port->toggle_edge_mode &= ~U300_PIN_BIT(offset); in u300_gpio_irq_type()
489 int offset = d->hwirq; in u300_gpio_irq_enable() local
494 d->hwirq, port->name, offset); in u300_gpio_irq_enable()
496 val = readl(U300_PIN_REG(offset, ien)); in u300_gpio_irq_enable()
497 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); in u300_gpio_irq_enable()
505 int offset = d->hwirq; in u300_gpio_irq_disable() local
510 val = readl(U300_PIN_REG(offset, ien)); in u300_gpio_irq_disable()
511 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); in u300_gpio_irq_disable()
545 int offset = pinoffset + irqoffset; in u300_gpio_irq_handler() local
546 int pin_irq = irq_find_mapping(chip->irqdomain, offset); in u300_gpio_irq_handler()
549 pin_irq, offset); in u300_gpio_irq_handler()
555 if (port->toggle_edge_mode & U300_PIN_BIT(offset)) in u300_gpio_irq_handler()
556 u300_toggle_trigger(gpio, offset); in u300_gpio_irq_handler()
564 int offset, in u300_gpio_init_pin() argument
569 u300_gpio_direction_output(&gpio->chip, offset, conf->outval); in u300_gpio_init_pin()
572 u300_gpio_config_set(&gpio->chip, offset, in u300_gpio_init_pin()
576 u300_gpio_config_set(&gpio->chip, offset, in u300_gpio_init_pin()
580 offset, conf->outval); in u300_gpio_init_pin()
582 u300_gpio_direction_input(&gpio->chip, offset); in u300_gpio_init_pin()
585 u300_gpio_set(&gpio->chip, offset, 0); in u300_gpio_init_pin()
588 u300_gpio_config_set(&gpio->chip, offset, conf->bias_mode); in u300_gpio_init_pin()
591 offset, conf->bias_mode); in u300_gpio_init_pin()
603 int offset = (i*8) + j; in u300_gpio_init_coh901571() local
606 u300_gpio_init_pin(gpio, offset, conf); in u300_gpio_init_coh901571()
617 unsigned int offset; member
621 #define COH901_PINRANGE(a, b) { .offset = a, .pin_base = b }
748 p->offset, p->pin_base, 1); in u300_gpio_probe()