Lines Matching refs:port
196 static inline u32 hwirq_to_pintbit(struct gpio_port *port, int hwirq) in hwirq_to_pintbit() argument
198 return port->pint_assign ? BIT(hwirq) << PINT_HI_OFFSET : BIT(hwirq); in hwirq_to_pintbit()
215 static inline void port_setup(struct gpio_port *port, unsigned offset, in port_setup() argument
218 struct gpio_port_t *regs = port->regs; in port_setup()
227 static inline void portmux_setup(struct gpio_port *port, unsigned offset, in portmux_setup() argument
230 struct gpio_port_t *regs = port->regs; in portmux_setup()
244 static inline u16 get_portmux(struct gpio_port *port, unsigned offset) in get_portmux() argument
246 struct gpio_port_t *regs = port->regs; in get_portmux()
258 struct gpio_port *port = irq_data_get_irq_chip_data(d); in adi_gpio_ack_irq() local
259 struct gpio_pint_regs *regs = port->pint->regs; in adi_gpio_ack_irq()
260 unsigned pintbit = hwirq_to_pintbit(port, d->hwirq); in adi_gpio_ack_irq()
262 spin_lock_irqsave(&port->lock, flags); in adi_gpio_ack_irq()
263 spin_lock(&port->pint->lock); in adi_gpio_ack_irq()
274 spin_unlock(&port->pint->lock); in adi_gpio_ack_irq()
275 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_ack_irq()
281 struct gpio_port *port = irq_data_get_irq_chip_data(d); in adi_gpio_mask_ack_irq() local
282 struct gpio_pint_regs *regs = port->pint->regs; in adi_gpio_mask_ack_irq()
283 unsigned pintbit = hwirq_to_pintbit(port, d->hwirq); in adi_gpio_mask_ack_irq()
285 spin_lock_irqsave(&port->lock, flags); in adi_gpio_mask_ack_irq()
286 spin_lock(&port->pint->lock); in adi_gpio_mask_ack_irq()
298 spin_unlock(&port->pint->lock); in adi_gpio_mask_ack_irq()
299 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_mask_ack_irq()
305 struct gpio_port *port = irq_data_get_irq_chip_data(d); in adi_gpio_mask_irq() local
306 struct gpio_pint_regs *regs = port->pint->regs; in adi_gpio_mask_irq()
308 spin_lock_irqsave(&port->lock, flags); in adi_gpio_mask_irq()
309 spin_lock(&port->pint->lock); in adi_gpio_mask_irq()
311 writel(hwirq_to_pintbit(port, d->hwirq), ®s->mask_clear); in adi_gpio_mask_irq()
313 spin_unlock(&port->pint->lock); in adi_gpio_mask_irq()
314 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_mask_irq()
320 struct gpio_port *port = irq_data_get_irq_chip_data(d); in adi_gpio_unmask_irq() local
321 struct gpio_pint_regs *regs = port->pint->regs; in adi_gpio_unmask_irq()
323 spin_lock_irqsave(&port->lock, flags); in adi_gpio_unmask_irq()
324 spin_lock(&port->pint->lock); in adi_gpio_unmask_irq()
326 writel(hwirq_to_pintbit(port, d->hwirq), ®s->mask_set); in adi_gpio_unmask_irq()
328 spin_unlock(&port->pint->lock); in adi_gpio_unmask_irq()
329 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_unmask_irq()
335 struct gpio_port *port = irq_data_get_irq_chip_data(d); in adi_gpio_irq_startup() local
338 if (!port) { in adi_gpio_irq_startup()
344 regs = port->pint->regs; in adi_gpio_irq_startup()
346 spin_lock_irqsave(&port->lock, flags); in adi_gpio_irq_startup()
347 spin_lock(&port->pint->lock); in adi_gpio_irq_startup()
349 port_setup(port, d->hwirq, true); in adi_gpio_irq_startup()
350 writew(BIT(d->hwirq), &port->regs->dir_clear); in adi_gpio_irq_startup()
351 writew(readw(&port->regs->inen) | BIT(d->hwirq), &port->regs->inen); in adi_gpio_irq_startup()
353 writel(hwirq_to_pintbit(port, d->hwirq), ®s->mask_set); in adi_gpio_irq_startup()
355 spin_unlock(&port->pint->lock); in adi_gpio_irq_startup()
356 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_irq_startup()
364 struct gpio_port *port = irq_data_get_irq_chip_data(d); in adi_gpio_irq_shutdown() local
365 struct gpio_pint_regs *regs = port->pint->regs; in adi_gpio_irq_shutdown()
367 spin_lock_irqsave(&port->lock, flags); in adi_gpio_irq_shutdown()
368 spin_lock(&port->pint->lock); in adi_gpio_irq_shutdown()
370 writel(hwirq_to_pintbit(port, d->hwirq), ®s->mask_clear); in adi_gpio_irq_shutdown()
372 spin_unlock(&port->pint->lock); in adi_gpio_irq_shutdown()
373 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_irq_shutdown()
379 struct gpio_port *port = irq_data_get_irq_chip_data(d); in adi_gpio_irq_type() local
386 if (!port) { in adi_gpio_irq_type()
391 pint_regs = port->pint->regs; in adi_gpio_irq_type()
393 pintmask = hwirq_to_pintbit(port, d->hwirq); in adi_gpio_irq_type()
395 spin_lock_irqsave(&port->lock, flags); in adi_gpio_irq_type()
396 spin_lock(&port->pint->lock); in adi_gpio_irq_type()
405 port_setup(port, d->hwirq, true); in adi_gpio_irq_type()
422 if (gpio_get_value(port->chip.base + d->hwirq)) in adi_gpio_irq_type()
437 spin_unlock(&port->pint->lock); in adi_gpio_irq_type()
438 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_irq_type()
446 struct gpio_port *port = irq_data_get_irq_chip_data(d); in adi_gpio_set_wake() local
448 if (!port || !port->pint || port->pint->irq != d->irq) in adi_gpio_set_wake()
452 adi_internal_set_wake(port->pint->irq, state); in adi_gpio_set_wake()
485 struct gpio_port *port; in adi_gpio_suspend() local
487 list_for_each_entry(port, &adi_gpio_port_list, node) { in adi_gpio_suspend()
488 port->saved_data.fer = readw(&port->regs->port_fer); in adi_gpio_suspend()
489 port->saved_data.mux = readl(&port->regs->port_mux); in adi_gpio_suspend()
490 port->saved_data.data = readw(&port->regs->data); in adi_gpio_suspend()
491 port->saved_data.inen = readw(&port->regs->inen); in adi_gpio_suspend()
492 port->saved_data.dir = readw(&port->regs->dir_set); in adi_gpio_suspend()
500 struct gpio_port *port; in adi_gpio_resume() local
504 list_for_each_entry(port, &adi_gpio_port_list, node) { in adi_gpio_resume()
505 writel(port->saved_data.mux, &port->regs->port_mux); in adi_gpio_resume()
506 writew(port->saved_data.fer, &port->regs->port_fer); in adi_gpio_resume()
507 writew(port->saved_data.inen, &port->regs->inen); in adi_gpio_resume()
508 writew(port->saved_data.data & port->saved_data.dir, in adi_gpio_resume()
509 &port->regs->data_set); in adi_gpio_resume()
510 writew(port->saved_data.dir, &port->regs->dir_set); in adi_gpio_resume()
626 struct gpio_port *port; in adi_pinmux_set() local
640 port = container_of(range->gc, struct gpio_port, chip); in adi_pinmux_set()
642 spin_lock_irqsave(&port->lock, flags); in adi_pinmux_set()
644 portmux_setup(port, pin_to_offset(range, pin), in adi_pinmux_set()
646 port_setup(port, pin_to_offset(range, pin), false); in adi_pinmux_set()
649 spin_unlock_irqrestore(&port->lock, flags); in adi_pinmux_set()
684 struct gpio_port *port; in adi_pinmux_request_gpio() local
688 port = container_of(range->gc, struct gpio_port, chip); in adi_pinmux_request_gpio()
691 spin_lock_irqsave(&port->lock, flags); in adi_pinmux_request_gpio()
693 port_setup(port, offset, true); in adi_pinmux_request_gpio()
695 spin_unlock_irqrestore(&port->lock, flags); in adi_pinmux_request_gpio()
728 struct gpio_port *port; in adi_gpio_direction_input() local
731 port = container_of(chip, struct gpio_port, chip); in adi_gpio_direction_input()
733 spin_lock_irqsave(&port->lock, flags); in adi_gpio_direction_input()
735 writew(BIT(offset), &port->regs->dir_clear); in adi_gpio_direction_input()
736 writew(readw(&port->regs->inen) | BIT(offset), &port->regs->inen); in adi_gpio_direction_input()
738 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_direction_input()
746 struct gpio_port *port = container_of(chip, struct gpio_port, chip); in adi_gpio_set_value() local
747 struct gpio_port_t *regs = port->regs; in adi_gpio_set_value()
750 spin_lock_irqsave(&port->lock, flags); in adi_gpio_set_value()
757 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_set_value()
763 struct gpio_port *port = container_of(chip, struct gpio_port, chip); in adi_gpio_direction_output() local
764 struct gpio_port_t *regs = port->regs; in adi_gpio_direction_output()
767 spin_lock_irqsave(&port->lock, flags); in adi_gpio_direction_output()
776 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_direction_output()
783 struct gpio_port *port = container_of(chip, struct gpio_port, chip); in adi_gpio_get_value() local
784 struct gpio_port_t *regs = port->regs; in adi_gpio_get_value()
788 spin_lock_irqsave(&port->lock, flags); in adi_gpio_get_value()
792 spin_unlock_irqrestore(&port->lock, flags); in adi_gpio_get_value()
799 struct gpio_port *port = container_of(chip, struct gpio_port, chip); in adi_gpio_to_irq() local
801 if (port->irq_base >= 0) in adi_gpio_to_irq()
802 return irq_find_mapping(port->domain, offset); in adi_gpio_to_irq()
804 return irq_create_mapping(port->domain, offset); in adi_gpio_to_irq()
888 struct gpio_port *port = d->host_data; in adi_gpio_irq_map() local
890 if (!port) in adi_gpio_irq_map()
893 irq_set_chip_data(irq, port); in adi_gpio_irq_map()
905 static int adi_gpio_init_int(struct gpio_port *port) in adi_gpio_init_int() argument
907 struct device_node *node = port->dev->of_node; in adi_gpio_init_int()
908 struct gpio_pint *pint = port->pint; in adi_gpio_init_int()
911 port->domain = irq_domain_add_linear(node, port->width, in adi_gpio_init_int()
912 &adi_gpio_irq_domain_ops, port); in adi_gpio_init_int()
913 if (!port->domain) { in adi_gpio_init_int()
914 dev_err(port->dev, "Failed to create irqdomain\n"); in adi_gpio_init_int()
925 ret = pint->pint_map_port(port->pint, port->pint_assign, in adi_gpio_init_int()
926 port->pint_map, port->domain); in adi_gpio_init_int()
930 if (port->irq_base >= 0) { in adi_gpio_init_int()
931 ret = irq_create_strict_mappings(port->domain, port->irq_base, in adi_gpio_init_int()
932 0, port->width); in adi_gpio_init_int()
934 dev_err(port->dev, "Couldn't associate to domain\n"); in adi_gpio_init_int()
949 struct gpio_port *port; in adi_gpio_probe() local
958 port = devm_kzalloc(dev, sizeof(struct gpio_port), GFP_KERNEL); in adi_gpio_probe()
959 if (!port) { in adi_gpio_probe()
965 port->base = devm_ioremap_resource(dev, res); in adi_gpio_probe()
966 if (IS_ERR(port->base)) in adi_gpio_probe()
967 return PTR_ERR(port->base); in adi_gpio_probe()
971 port->irq_base = -1; in adi_gpio_probe()
973 port->irq_base = res->start; in adi_gpio_probe()
975 port->width = pdata->port_width; in adi_gpio_probe()
976 port->dev = dev; in adi_gpio_probe()
977 port->regs = (struct gpio_port_t *)port->base; in adi_gpio_probe()
978 port->pint_assign = pdata->pint_assign; in adi_gpio_probe()
979 port->pint_map = pdata->pint_map; in adi_gpio_probe()
981 port->pint = find_gpio_pint(pdata->pint_id); in adi_gpio_probe()
982 if (port->pint) { in adi_gpio_probe()
983 ret = adi_gpio_init_int(port); in adi_gpio_probe()
988 spin_lock_init(&port->lock); in adi_gpio_probe()
990 platform_set_drvdata(pdev, port); in adi_gpio_probe()
992 port->chip.label = "adi-gpio"; in adi_gpio_probe()
993 port->chip.direction_input = adi_gpio_direction_input; in adi_gpio_probe()
994 port->chip.get = adi_gpio_get_value; in adi_gpio_probe()
995 port->chip.direction_output = adi_gpio_direction_output; in adi_gpio_probe()
996 port->chip.set = adi_gpio_set_value; in adi_gpio_probe()
997 port->chip.request = adi_gpio_request; in adi_gpio_probe()
998 port->chip.free = adi_gpio_free; in adi_gpio_probe()
999 port->chip.to_irq = adi_gpio_to_irq; in adi_gpio_probe()
1001 port->chip.base = pdata->port_gpio_base; in adi_gpio_probe()
1003 port->chip.base = gpio; in adi_gpio_probe()
1004 port->chip.ngpio = port->width; in adi_gpio_probe()
1005 gpio = port->chip.base + port->width; in adi_gpio_probe()
1007 ret = gpiochip_add(&port->chip); in adi_gpio_probe()
1017 ret = gpiochip_add_pin_range(&port->chip, pinctrl_devname, in adi_gpio_probe()
1018 0, pdata->port_pin_base, port->width); in adi_gpio_probe()
1025 list_add_tail(&port->node, &adi_gpio_port_list); in adi_gpio_probe()
1030 gpiochip_remove(&port->chip); in adi_gpio_probe()
1032 if (port->pint) in adi_gpio_probe()
1033 irq_domain_remove(port->domain); in adi_gpio_probe()
1040 struct gpio_port *port = platform_get_drvdata(pdev); in adi_gpio_remove() local
1043 list_del(&port->node); in adi_gpio_remove()
1044 gpiochip_remove(&port->chip); in adi_gpio_remove()
1045 if (port->pint) { in adi_gpio_remove()
1046 for (offset = 0; offset < port->width; offset++) in adi_gpio_remove()
1047 irq_dispose_mapping(irq_find_mapping(port->domain, in adi_gpio_remove()
1049 irq_domain_remove(port->domain); in adi_gpio_remove()