160 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_reg()  local
166 		reg_offset = vg->range->pins[offset] * 16;  in byt_gpio_reg()
168 	return vg->reg_base + reg_offset + reg;  in byt_gpio_reg()
171 static void byt_gpio_clear_triggering(struct byt_gpio *vg, unsigned offset)  in byt_gpio_clear_triggering()  argument
173 	void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);  in byt_gpio_clear_triggering()
177 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_clear_triggering()
181 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_clear_triggering()
184 static u32 byt_get_gpio_mux(struct byt_gpio *vg, unsigned offset)  in byt_get_gpio_mux()  argument
187 	if (!strcmp(vg->range->name, BYT_SCORE_ACPI_UID) &&  in byt_get_gpio_mux()
192 	if (!strcmp(vg->range->name, BYT_SUS_ACPI_UID) &&  in byt_get_gpio_mux()
201 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_request()  local
206 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_request()
218 	gpio_mux = byt_get_gpio_mux(vg, offset);  in byt_gpio_request()
224 		dev_warn(&vg->pdev->dev,  in byt_gpio_request()
228 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_request()
230 	pm_runtime_get(&vg->pdev->dev);  in byt_gpio_request()
237 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_free()  local
239 	byt_gpio_clear_triggering(vg, offset);  in byt_gpio_free()
240 	pm_runtime_put(&vg->pdev->dev);  in byt_gpio_free()
245 	struct byt_gpio *vg = to_byt_gpio(irq_data_get_irq_chip_data(d));  in byt_irq_type()  local
249 	void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);  in byt_irq_type()
251 	if (offset >= vg->chip.ngpio)  in byt_irq_type()
254 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_irq_type()
273 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_irq_type()
281 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_get()  local
285 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_get()
287 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_get()
294 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_set()  local
299 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_set()
308 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_set()
313 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_direction_input()  local
318 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_direction_input()
324 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_direction_input()
332 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_direction_output()  local
338 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_direction_output()
357 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_direction_output()
364 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_dbg_show()  local
368 	for (i = 0; i < vg->chip.ngpio; i++) {  in byt_gpio_dbg_show()
373 		offs = vg->range->pins[i] * 16;  in byt_gpio_dbg_show()
375 		raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_dbg_show()
376 		conf0 = readl(vg->reg_base + offs + BYT_CONF0_REG);  in byt_gpio_dbg_show()
377 		val = readl(vg->reg_base + offs + BYT_VAL_REG);  in byt_gpio_dbg_show()
378 		raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_dbg_show()
415 			   vg->range->pins[i], offs,  in byt_gpio_dbg_show()
436 	struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc));  in byt_gpio_irq_handler()  local
444 	for (base = 0; base < vg->chip.ngpio; base += 32) {  in byt_gpio_irq_handler()
445 		reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);  in byt_gpio_irq_handler()
448 			virq = irq_find_mapping(vg->chip.irqdomain, base + pin);  in byt_gpio_irq_handler()
458 	struct byt_gpio *vg = to_byt_gpio(gc);  in byt_irq_ack()  local
462 	raw_spin_lock(&vg->lock);  in byt_irq_ack()
463 	reg = byt_gpio_reg(&vg->chip, offset, BYT_INT_STAT_REG);  in byt_irq_ack()
465 	raw_spin_unlock(&vg->lock);  in byt_irq_ack()
471 	struct byt_gpio *vg = to_byt_gpio(gc);  in byt_irq_unmask()  local
477 	reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);  in byt_irq_unmask()
479 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_irq_unmask()
500 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_irq_unmask()
506 	struct byt_gpio *vg = to_byt_gpio(gc);  in byt_irq_mask()  local
508 	byt_gpio_clear_triggering(vg, irqd_to_hwirq(d));  in byt_irq_mask()
520 static void byt_gpio_irq_init_hw(struct byt_gpio *vg)  in byt_gpio_irq_init_hw()  argument
531 	for (i = 0; i < vg->chip.ngpio; i++) {  in byt_gpio_irq_init_hw()
532 		value = readl(byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG));  in byt_gpio_irq_init_hw()
533 		if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i) &&  in byt_gpio_irq_init_hw()
535 			byt_gpio_clear_triggering(vg, i);  in byt_gpio_irq_init_hw()
536 			dev_dbg(&vg->pdev->dev, "disabling GPIO %d\n", i);  in byt_gpio_irq_init_hw()
541 	for (base = 0; base < vg->chip.ngpio; base += 32) {  in byt_gpio_irq_init_hw()
542 		reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);  in byt_gpio_irq_init_hw()
548 			dev_err(&vg->pdev->dev,  in byt_gpio_irq_init_hw()
555 	struct byt_gpio *vg;  in byt_gpio_probe()  local
567 	vg = devm_kzalloc(dev, sizeof(struct byt_gpio), GFP_KERNEL);  in byt_gpio_probe()
568 	if (!vg) {  in byt_gpio_probe()
575 			vg->chip.ngpio = range->npins;  in byt_gpio_probe()
576 			vg->range = range;  in byt_gpio_probe()
581 	if (!vg->chip.ngpio || !vg->range)  in byt_gpio_probe()
584 	vg->pdev = pdev;  in byt_gpio_probe()
585 	platform_set_drvdata(pdev, vg);  in byt_gpio_probe()
588 	vg->reg_base = devm_ioremap_resource(dev, mem_rc);  in byt_gpio_probe()
589 	if (IS_ERR(vg->reg_base))  in byt_gpio_probe()
590 		return PTR_ERR(vg->reg_base);  in byt_gpio_probe()
592 	raw_spin_lock_init(&vg->lock);  in byt_gpio_probe()
594 	gc = &vg->chip;  in byt_gpio_probe()
609 	vg->saved_context = devm_kcalloc(&pdev->dev, gc->ngpio,  in byt_gpio_probe()
610 				       sizeof(*vg->saved_context), GFP_KERNEL);  in byt_gpio_probe()
622 		byt_gpio_irq_init_hw(vg);  in byt_gpio_probe()
645 	struct byt_gpio *vg = platform_get_drvdata(pdev);  in byt_gpio_suspend()  local
648 	for (i = 0; i < vg->chip.ngpio; i++) {  in byt_gpio_suspend()
652 		reg = byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG);  in byt_gpio_suspend()
654 		vg->saved_context[i].conf0 = value;  in byt_gpio_suspend()
656 		reg = byt_gpio_reg(&vg->chip, i, BYT_VAL_REG);  in byt_gpio_suspend()
658 		vg->saved_context[i].val = value;  in byt_gpio_suspend()
667 	struct byt_gpio *vg = platform_get_drvdata(pdev);  in byt_gpio_resume()  local
670 	for (i = 0; i < vg->chip.ngpio; i++) {  in byt_gpio_resume()
674 		reg = byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG);  in byt_gpio_resume()
677 		     vg->saved_context[i].conf0) {  in byt_gpio_resume()
679 			value |= vg->saved_context[i].conf0;  in byt_gpio_resume()
684 		reg = byt_gpio_reg(&vg->chip, i, BYT_VAL_REG);  in byt_gpio_resume()
687 		     vg->saved_context[i].val) {  in byt_gpio_resume()
691 			v |= vg->saved_context[i].val;  in byt_gpio_resume()
729 	struct byt_gpio *vg = platform_get_drvdata(pdev);  in byt_gpio_remove()  local
732 	gpiochip_remove(&vg->chip);  in byt_gpio_remove()