123 static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)  in ti_pipe3_get_dpll_params()  argument
126 	struct pipe3_dpll_map *dpll_map = phy->dpll_map;  in ti_pipe3_get_dpll_params()
128 	rate = clk_get_rate(phy->sys_clk);  in ti_pipe3_get_dpll_params()
135 	dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate);  in ti_pipe3_get_dpll_params()
140 static int ti_pipe3_power_off(struct phy *x)  in ti_pipe3_power_off()
142 	struct ti_pipe3 *phy = phy_get_drvdata(x);  in ti_pipe3_power_off()  local
144 	omap_control_phy_power(phy->control_dev, 0);  in ti_pipe3_power_off()
149 static int ti_pipe3_power_on(struct phy *x)  in ti_pipe3_power_on()
151 	struct ti_pipe3 *phy = phy_get_drvdata(x);  in ti_pipe3_power_on()  local
153 	omap_control_phy_power(phy->control_dev, 1);  in ti_pipe3_power_on()
158 static int ti_pipe3_dpll_wait_lock(struct ti_pipe3 *phy)  in ti_pipe3_dpll_wait_lock()  argument
166 		val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);  in ti_pipe3_dpll_wait_lock()
171 	dev_err(phy->dev, "DPLL failed to lock\n");  in ti_pipe3_dpll_wait_lock()
175 static int ti_pipe3_dpll_program(struct ti_pipe3 *phy)  in ti_pipe3_dpll_program()  argument
180 	dpll_params = ti_pipe3_get_dpll_params(phy);  in ti_pipe3_dpll_program()
184 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);  in ti_pipe3_dpll_program()
187 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);  in ti_pipe3_dpll_program()
189 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);  in ti_pipe3_dpll_program()
192 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_dpll_program()
194 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);  in ti_pipe3_dpll_program()
197 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);  in ti_pipe3_dpll_program()
199 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);  in ti_pipe3_dpll_program()
202 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);  in ti_pipe3_dpll_program()
204 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);  in ti_pipe3_dpll_program()
207 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);  in ti_pipe3_dpll_program()
209 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);  in ti_pipe3_dpll_program()
211 	return ti_pipe3_dpll_wait_lock(phy);  in ti_pipe3_dpll_program()
214 static int ti_pipe3_init(struct phy *x)  in ti_pipe3_init()
216 	struct ti_pipe3 *phy = phy_get_drvdata(x);  in ti_pipe3_init()  local
225 	if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie")) {  in ti_pipe3_init()
226 		omap_control_pcie_pcs(phy->control_dev, 0x96);  in ti_pipe3_init()
231 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);  in ti_pipe3_init()
234 		ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_init()
235 		ret = ti_pipe3_dpll_wait_lock(phy);  in ti_pipe3_init()
239 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);  in ti_pipe3_init()
241 		if (ti_pipe3_dpll_program(phy))  in ti_pipe3_init()
247 static int ti_pipe3_exit(struct phy *x)  in ti_pipe3_exit()
249 	struct ti_pipe3 *phy = phy_get_drvdata(x);  in ti_pipe3_exit()  local
256 	if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata") ||  in ti_pipe3_exit()
257 	    of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie"))  in ti_pipe3_exit()
261 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);  in ti_pipe3_exit()
263 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_exit()
269 		val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);  in ti_pipe3_exit()
275 		dev_err(phy->dev, "Failed to power down: PLL_STATUS 0x%x\n",  in ti_pipe3_exit()
294 	struct ti_pipe3 *phy;  in ti_pipe3_probe()  local
295 	struct phy *generic_phy;  in ti_pipe3_probe()
304 	phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);  in ti_pipe3_probe()
305 	if (!phy)  in ti_pipe3_probe()
308 	phy->dev		= &pdev->dev;  in ti_pipe3_probe()
309 	spin_lock_init(&phy->lock);  in ti_pipe3_probe()
316 		phy->dpll_map = (struct pipe3_dpll_map *)match->data;  in ti_pipe3_probe()
317 		if (!phy->dpll_map) {  in ti_pipe3_probe()
324 		phy->pll_ctrl_base = devm_ioremap_resource(&pdev->dev, res);  in ti_pipe3_probe()
325 		if (IS_ERR(phy->pll_ctrl_base))  in ti_pipe3_probe()
326 			return PTR_ERR(phy->pll_ctrl_base);  in ti_pipe3_probe()
328 		phy->sys_clk = devm_clk_get(phy->dev, "sysclk");  in ti_pipe3_probe()
329 		if (IS_ERR(phy->sys_clk)) {  in ti_pipe3_probe()
335 	phy->refclk = devm_clk_get(phy->dev, "refclk");  in ti_pipe3_probe()
336 	if (IS_ERR(phy->refclk)) {  in ti_pipe3_probe()
342 			return PTR_ERR(phy->refclk);  in ti_pipe3_probe()
346 		phy->wkupclk = devm_clk_get(phy->dev, "wkupclk");  in ti_pipe3_probe()
347 		if (IS_ERR(phy->wkupclk)) {  in ti_pipe3_probe()
349 			return PTR_ERR(phy->wkupclk);  in ti_pipe3_probe()
352 		phy->wkupclk = ERR_PTR(-ENODEV);  in ti_pipe3_probe()
357 		clk = devm_clk_get(phy->dev, "dpll_ref");  in ti_pipe3_probe()
364 		clk = devm_clk_get(phy->dev, "dpll_ref_m2");  in ti_pipe3_probe()
371 		clk = devm_clk_get(phy->dev, "phy-div");  in ti_pipe3_probe()
378 		phy->div_clk = devm_clk_get(phy->dev, "div-clk");  in ti_pipe3_probe()
379 		if (IS_ERR(phy->div_clk)) {  in ti_pipe3_probe()
381 			return PTR_ERR(phy->div_clk);  in ti_pipe3_probe()
384 		phy->div_clk = ERR_PTR(-ENODEV);  in ti_pipe3_probe()
399 	phy->control_dev = &control_pdev->dev;  in ti_pipe3_probe()
401 	omap_control_phy_power(phy->control_dev, 0);  in ti_pipe3_probe()
403 	platform_set_drvdata(pdev, phy);  in ti_pipe3_probe()
404 	pm_runtime_enable(phy->dev);  in ti_pipe3_probe()
406 	generic_phy = devm_phy_create(phy->dev, NULL, &ops);  in ti_pipe3_probe()
410 	phy_set_drvdata(generic_phy, phy);  in ti_pipe3_probe()
411 	phy_provider = devm_of_phy_provider_register(phy->dev,  in ti_pipe3_probe()
431 static int ti_pipe3_enable_refclk(struct ti_pipe3 *phy)  in ti_pipe3_enable_refclk()  argument
433 	if (!IS_ERR(phy->refclk) && !phy->refclk_enabled) {  in ti_pipe3_enable_refclk()
436 		ret = clk_prepare_enable(phy->refclk);  in ti_pipe3_enable_refclk()
438 			dev_err(phy->dev, "Failed to enable refclk %d\n", ret);  in ti_pipe3_enable_refclk()
441 		phy->refclk_enabled = true;  in ti_pipe3_enable_refclk()
447 static void ti_pipe3_disable_refclk(struct ti_pipe3 *phy)  in ti_pipe3_disable_refclk()  argument
449 	if (!IS_ERR(phy->refclk))  in ti_pipe3_disable_refclk()
450 		clk_disable_unprepare(phy->refclk);  in ti_pipe3_disable_refclk()
452 	phy->refclk_enabled = false;  in ti_pipe3_disable_refclk()
455 static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy)  in ti_pipe3_enable_clocks()  argument
460 	spin_lock_irqsave(&phy->lock, flags);  in ti_pipe3_enable_clocks()
461 	if (phy->enabled)  in ti_pipe3_enable_clocks()
464 	ret = ti_pipe3_enable_refclk(phy);  in ti_pipe3_enable_clocks()
468 	if (!IS_ERR(phy->wkupclk)) {  in ti_pipe3_enable_clocks()
469 		ret = clk_prepare_enable(phy->wkupclk);  in ti_pipe3_enable_clocks()
471 			dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret);  in ti_pipe3_enable_clocks()
476 	if (!IS_ERR(phy->div_clk)) {  in ti_pipe3_enable_clocks()
477 		ret = clk_prepare_enable(phy->div_clk);  in ti_pipe3_enable_clocks()
479 			dev_err(phy->dev, "Failed to enable div_clk %d\n", ret);  in ti_pipe3_enable_clocks()
484 	phy->enabled = true;  in ti_pipe3_enable_clocks()
485 	spin_unlock_irqrestore(&phy->lock, flags);  in ti_pipe3_enable_clocks()
489 	if (!IS_ERR(phy->wkupclk))  in ti_pipe3_enable_clocks()
490 		clk_disable_unprepare(phy->wkupclk);  in ti_pipe3_enable_clocks()
493 	if (!IS_ERR(phy->refclk))  in ti_pipe3_enable_clocks()
494 		clk_disable_unprepare(phy->refclk);  in ti_pipe3_enable_clocks()
496 	ti_pipe3_disable_refclk(phy);  in ti_pipe3_enable_clocks()
498 	spin_unlock_irqrestore(&phy->lock, flags);  in ti_pipe3_enable_clocks()
502 static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy)  in ti_pipe3_disable_clocks()  argument
506 	spin_lock_irqsave(&phy->lock, flags);  in ti_pipe3_disable_clocks()
507 	if (!phy->enabled) {  in ti_pipe3_disable_clocks()
508 		spin_unlock_irqrestore(&phy->lock, flags);  in ti_pipe3_disable_clocks()
512 	if (!IS_ERR(phy->wkupclk))  in ti_pipe3_disable_clocks()
513 		clk_disable_unprepare(phy->wkupclk);  in ti_pipe3_disable_clocks()
515 	if (!of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata"))  in ti_pipe3_disable_clocks()
516 		ti_pipe3_disable_refclk(phy);  in ti_pipe3_disable_clocks()
517 	if (!IS_ERR(phy->div_clk))  in ti_pipe3_disable_clocks()
518 		clk_disable_unprepare(phy->div_clk);  in ti_pipe3_disable_clocks()
519 	phy->enabled = false;  in ti_pipe3_disable_clocks()
520 	spin_unlock_irqrestore(&phy->lock, flags);  in ti_pipe3_disable_clocks()
525 	struct ti_pipe3	*phy = dev_get_drvdata(dev);  in ti_pipe3_runtime_suspend()  local
527 	ti_pipe3_disable_clocks(phy);  in ti_pipe3_runtime_suspend()
533 	struct ti_pipe3	*phy = dev_get_drvdata(dev);  in ti_pipe3_runtime_resume()  local
536 	ret = ti_pipe3_enable_clocks(phy);  in ti_pipe3_runtime_resume()
542 	struct ti_pipe3	*phy = dev_get_drvdata(dev);  in ti_pipe3_suspend()  local
544 	ti_pipe3_disable_clocks(phy);  in ti_pipe3_suspend()
550 	struct ti_pipe3	*phy = dev_get_drvdata(dev);  in ti_pipe3_resume()  local
553 	ret = ti_pipe3_enable_clocks(phy);  in ti_pipe3_resume()