168 	int pos;  in aer_disable_rootport()  local
176 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);  in aer_disable_rootport()
178 	pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, &reg32);  in aer_disable_rootport()
180 	pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, reg32);  in aer_disable_rootport()
183 	pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, &reg32);  in aer_disable_rootport()
184 	pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, reg32);  in aer_disable_rootport()
201 	int pos;  in aer_irq()  local
203 	pos = pci_find_ext_capability(pdev->port, PCI_EXT_CAP_ID_ERR);  in aer_irq()
211 	pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, &status);  in aer_irq()
218 	pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_ERR_SRC, &id);  in aer_irq()
219 	pci_write_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, status);  in aer_irq()
344 	int pos;  in aer_root_reset()  local
346 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);  in aer_root_reset()
349 	pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, &reg32);  in aer_root_reset()
351 	pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);  in aer_root_reset()
357 	pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);  in aer_root_reset()
358 	pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, reg32);  in aer_root_reset()
361 	pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, &reg32);  in aer_root_reset()
363 	pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);  in aer_root_reset()
390 	int pos;  in aer_error_resume()  local
399 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);  in aer_error_resume()
400 	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);  in aer_error_resume()
401 	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);  in aer_error_resume()
406 	pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);  in aer_error_resume()