Lines Matching refs:physport

140 	const struct parport_pc_private *priv = p->physport->private_data;  in change_mode()
160 unsigned long expire = jiffies + p->physport->cad->timeout; in change_mode()
247 const struct parport_pc_private *priv = p->physport->private_data; in parport_pc_save_state()
256 struct parport_pc_private *priv = p->physport->private_data; in parport_pc_restore_state()
476 unsigned long expire = jiffies + port->physport->cad->timeout; in parport_pc_fifo_write_block_pio()
479 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_fifo_write_block_pio()
482 port = port->physport; in parport_pc_fifo_write_block_pio()
574 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_fifo_write_block_dma()
575 struct device *dev = port->physport->dev; in parport_pc_fifo_write_block_dma()
597 port = port->physport; in parport_pc_fifo_write_block_dma()
608 unsigned long expire = jiffies + port->physport->cad->timeout; in parport_pc_fifo_write_block_dma()
715 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_compat_write_block_pio()
719 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) in parport_pc_compat_write_block_pio()
731 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_pc_compat_write_block_pio()
776 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_pc_compat_write_block_pio()
790 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_ecp_write_block_pio()
794 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) in parport_pc_ecp_write_block_pio()
799 if (port->physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) { in parport_pc_ecp_write_block_pio()
827 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_pc_ecp_write_block_pio()
891 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_pc_ecp_write_block_pio()
2292 dma_free_coherent(p->physport->dev, PAGE_SIZE, in parport_pc_unregister_port()