138 #define READ_REG32(addr) readl(addr)  macro
208     error_config = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG);		\
211     status_control = READ_REG32(d->hba.base_addr + LBA_STAT_CTL);		\
217 	arb_mask = READ_REG32(d->hba.base_addr + LBA_ARB_MASK);		\
243     lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR);	\
253     lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR);	\
291     error_status = READ_REG32(base + LBA_ERROR_STATUS);		\
316     lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR);	\
356 		case 4: data = READ_REG32(data_reg); break;  in lba_rd_cfg()
398 	case 4: *data = READ_REG32(data_reg); break;  in elroy_cfg_read()
465 	lba_t32 = READ_REG32(d->hba.base_addr + LBA_PCI_CFG_ADDR);  in elroy_cfg_write()
500 		*data = READ_REG32(data_reg);             break;  in mercury_cfg_read()
1046 				lba_len = ~READ_REG32(lba_dev->hba.base_addr  in lba_pat_resources()
1149 	lba_num = READ_REG32(lba_dev->hba.base_addr + LBA_FW_SCRATCH);  in lba_legacy_resources()
1231 	r->start = READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_BASE);  in lba_legacy_resources()
1239 		rsize = ~ READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_MASK);  in lba_legacy_resources()
1277 	r->start = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_BASE);  in lba_legacy_resources()
1285 		rsize = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_MASK);  in lba_legacy_resources()
1295 	r->start = READ_REG32(lba_dev->hba.base_addr + LBA_IOS_BASE) & ~1L;  in lba_legacy_resources()
1296 …r->end   = r->start + (READ_REG32(lba_dev->hba.base_addr + LBA_IOS_MASK) ^ (HBA_PORT_SPACE_SIZE - …  in lba_legacy_resources()
1354 	bus_reset = READ_REG32(d->hba.base_addr + LBA_STAT_CTL + 4) & 1;  in lba_hw_init()
1359 	stat = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG);  in lba_hw_init()
1367         stat = READ_REG32(d->hba.base_addr + LBA_STAT_CTL);  in lba_hw_init()
1378 	if (0 == READ_REG32(d->hba.base_addr + LBA_ARB_MASK)) {  in lba_hw_init()
1428 	func_class = READ_REG32(addr + LBA_FCLASS);  in lba_driver_probe()