547 	writeb(0xe0, ndev->reg_base + BWD_MODPHY_PCSREG6);  in bwd_recover_link()
548 	writeb(0x40, ndev->reg_base + BWD_MODPHY_PCSREG4);  in bwd_recover_link()
549 	writeb(0x60, ndev->reg_base + BWD_MODPHY_PCSREG4);  in bwd_recover_link()
550 	writeb(0x60, ndev->reg_base + BWD_MODPHY_PCSREG6);  in bwd_recover_link()
556 	status = readl(ndev->reg_base + BWD_ERRCORSTS_OFFSET);  in bwd_recover_link()
559 	writel(status, ndev->reg_base + BWD_ERRCORSTS_OFFSET);  in bwd_recover_link()
562 	status = readl(ndev->reg_base + BWD_LTSSMERRSTS0_OFFSET);  in bwd_recover_link()
565 	writel(status, ndev->reg_base + BWD_LTSSMERRSTS0_OFFSET);  in bwd_recover_link()
568 	status = readl(ndev->reg_base + BWD_DESKEWSTS_OFFSET);  in bwd_recover_link()
571 	writel(status, ndev->reg_base + BWD_DESKEWSTS_OFFSET);  in bwd_recover_link()
573 	status = readl(ndev->reg_base + BWD_IBSTERRRCRVSTS0_OFFSET);  in bwd_recover_link()
576 	writel(status, ndev->reg_base + BWD_IBSTERRRCRVSTS0_OFFSET);  in bwd_recover_link()
579 	status = readl(ndev->reg_base + BWD_LTSSMSTATEJMP_OFFSET);  in bwd_recover_link()
582 	writel(status, ndev->reg_base + BWD_LTSSMSTATEJMP_OFFSET);  in bwd_recover_link()
672 	status32 = readl(ndev->reg_base + BWD_LTSSMSTATEJMP_OFFSET);  in bwd_link_recovery()
676 	status32 = readl(ndev->reg_base + BWD_IBSTERRRCRVSTS0_OFFSET);  in bwd_link_recovery()
717 			u32 status32 = readl(ndev->reg_base +  in bwd_link_poll()
733 		ndev->reg_ofs.ldb = ndev->reg_base + SNB_PDOORBELL_OFFSET;  in ntb_xeon_setup()
734 		ndev->reg_ofs.ldb_mask = ndev->reg_base + SNB_PDBMSK_OFFSET;  in ntb_xeon_setup()
735 		ndev->reg_ofs.spad_read = ndev->reg_base + SNB_SPAD_OFFSET;  in ntb_xeon_setup()
736 		ndev->reg_ofs.bar2_xlat = ndev->reg_base + SNB_SBAR2XLAT_OFFSET;  in ntb_xeon_setup()
737 		ndev->reg_ofs.bar4_xlat = ndev->reg_base + SNB_SBAR4XLAT_OFFSET;  in ntb_xeon_setup()
740 				ndev->reg_base + SNB_SBAR5XLAT_OFFSET;  in ntb_xeon_setup()
764 			writeq(ndev->mw[1].bar_sz + 0x1000, ndev->reg_base +  in ntb_xeon_setup()
781 			ndev->reg_ofs.spad_write = ndev->reg_base +  in ntb_xeon_setup()
783 			ndev->reg_ofs.rdb = ndev->reg_base +  in ntb_xeon_setup()
790 			writeq(0, ndev->reg_base + SNB_PBAR4LMT_OFFSET);  in ntb_xeon_setup()
808 			writeq(SNB_MBAR23_DSD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
811 				writeq(SNB_MBAR01_DSD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
816 					       ndev->reg_base +  in ntb_xeon_setup()
819 					       ndev->reg_base +  in ntb_xeon_setup()
823 					       ndev->reg_base +  in ntb_xeon_setup()
830 				       ndev->reg_base + SNB_B2B_XLAT_OFFSETL);  in ntb_xeon_setup()
832 				       ndev->reg_base + SNB_B2B_XLAT_OFFSETU);  in ntb_xeon_setup()
835 			writeq(SNB_MBAR01_USD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
837 			writeq(SNB_MBAR23_USD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
840 				writel(SNB_MBAR4_USD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
842 				writel(SNB_MBAR5_USD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
845 				writeq(SNB_MBAR4_USD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
848 			writeq(SNB_MBAR23_USD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
851 				writeq(SNB_MBAR01_USD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
856 					       ndev->reg_base +  in ntb_xeon_setup()
859 					       ndev->reg_base +  in ntb_xeon_setup()
863 					       ndev->reg_base +  in ntb_xeon_setup()
871 				       ndev->reg_base + SNB_B2B_XLAT_OFFSETL);  in ntb_xeon_setup()
873 				       ndev->reg_base + SNB_B2B_XLAT_OFFSETU);  in ntb_xeon_setup()
875 			writeq(SNB_MBAR01_DSD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
877 			writeq(SNB_MBAR23_DSD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
880 				writel(SNB_MBAR4_DSD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
882 				writel(SNB_MBAR5_DSD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
885 				writeq(SNB_MBAR4_DSD_ADDR, ndev->reg_base +  in ntb_xeon_setup()
906 		ndev->reg_ofs.rdb = ndev->reg_base + SNB_SDOORBELL_OFFSET;  in ntb_xeon_setup()
907 		ndev->reg_ofs.ldb = ndev->reg_base + SNB_PDOORBELL_OFFSET;  in ntb_xeon_setup()
908 		ndev->reg_ofs.ldb_mask = ndev->reg_base + SNB_PDBMSK_OFFSET;  in ntb_xeon_setup()
912 		ndev->reg_ofs.spad_write = ndev->reg_base + SNB_SPAD_OFFSET +  in ntb_xeon_setup()
914 		ndev->reg_ofs.spad_read = ndev->reg_base + SNB_SPAD_OFFSET;  in ntb_xeon_setup()
915 		ndev->reg_ofs.bar2_xlat = ndev->reg_base + SNB_SBAR2XLAT_OFFSET;  in ntb_xeon_setup()
916 		ndev->reg_ofs.bar4_xlat = ndev->reg_base + SNB_SBAR4XLAT_OFFSET;  in ntb_xeon_setup()
919 				ndev->reg_base + SNB_SBAR5XLAT_OFFSET;  in ntb_xeon_setup()
937 		ndev->reg_ofs.rdb = ndev->reg_base + SNB_PDOORBELL_OFFSET;  in ntb_xeon_setup()
938 		ndev->reg_ofs.ldb = ndev->reg_base + SNB_SDOORBELL_OFFSET;  in ntb_xeon_setup()
939 		ndev->reg_ofs.ldb_mask = ndev->reg_base + SNB_SDBMSK_OFFSET;  in ntb_xeon_setup()
940 		ndev->reg_ofs.spad_write = ndev->reg_base + SNB_SPAD_OFFSET;  in ntb_xeon_setup()
944 		ndev->reg_ofs.spad_read = ndev->reg_base + SNB_SPAD_OFFSET +  in ntb_xeon_setup()
946 		ndev->reg_ofs.bar2_xlat = ndev->reg_base + SNB_PBAR2XLAT_OFFSET;  in ntb_xeon_setup()
947 		ndev->reg_ofs.bar4_xlat = ndev->reg_base + SNB_PBAR4XLAT_OFFSET;  in ntb_xeon_setup()
951 				ndev->reg_base + SNB_PBAR5XLAT_OFFSET;  in ntb_xeon_setup()
964 	ndev->reg_ofs.lnk_cntl = ndev->reg_base + SNB_NTBCNTL_OFFSET;  in ntb_xeon_setup()
965 	ndev->reg_ofs.lnk_stat = ndev->reg_base + SNB_SLINK_STATUS_OFFSET;  in ntb_xeon_setup()
966 	ndev->reg_ofs.spci_cmd = ndev->reg_base + SNB_PCICMD_OFFSET;  in ntb_xeon_setup()
1006 	ndev->reg_ofs.ldb = ndev->reg_base + BWD_PDOORBELL_OFFSET;  in ntb_bwd_setup()
1007 	ndev->reg_ofs.ldb_mask = ndev->reg_base + BWD_PDBMSK_OFFSET;  in ntb_bwd_setup()
1008 	ndev->reg_ofs.rdb = ndev->reg_base + BWD_B2B_DOORBELL_OFFSET;  in ntb_bwd_setup()
1009 	ndev->reg_ofs.bar2_xlat = ndev->reg_base + BWD_SBAR2XLAT_OFFSET;  in ntb_bwd_setup()
1010 	ndev->reg_ofs.bar4_xlat = ndev->reg_base + BWD_SBAR4XLAT_OFFSET;  in ntb_bwd_setup()
1011 	ndev->reg_ofs.lnk_cntl = ndev->reg_base + BWD_NTBCNTL_OFFSET;  in ntb_bwd_setup()
1012 	ndev->reg_ofs.lnk_stat = ndev->reg_base + BWD_LINK_STATUS_OFFSET;  in ntb_bwd_setup()
1013 	ndev->reg_ofs.spad_read = ndev->reg_base + BWD_SPAD_OFFSET;  in ntb_bwd_setup()
1014 	ndev->reg_ofs.spad_write = ndev->reg_base + BWD_B2B_SPAD_OFFSET;  in ntb_bwd_setup()
1015 	ndev->reg_ofs.spci_cmd = ndev->reg_base + BWD_PCICMD_OFFSET;  in ntb_bwd_setup()
1478 				   readw(ndev->reg_base +  in ntb_debugfs_read()
1749 	ndev->reg_base = pci_ioremap_bar(pdev, NTB_BAR_MMIO);  in ntb_pci_probe()
1750 	if (!ndev->reg_base) {  in ntb_pci_probe()
1841 	iounmap(ndev->reg_base);  in ntb_pci_probe()
1880 	iounmap(ndev->reg_base);  in ntb_pci_remove()