Lines Matching refs:RF90_PATH_B
240 else if (rfpath == RF90_PATH_B) in _rtl8821ae_phy_rf_serial_read()
253 else if (rfpath == RF90_PATH_B) in _rtl8821ae_phy_rf_serial_read()
260 else if (rfpath == RF90_PATH_B) in _rtl8821ae_phy_rf_serial_read()
642 phy_get_tx_swing_8812A(hw, band, RF90_PATH_B)); in rtl8821ae_phy_switch_wirelessband()
724 RF90_PATH_B, addr | maskforphyset); in _rtl8821ae_config_rf_radio_b()
912 for (path = RF90_PATH_A; path <= RF90_PATH_B; ++path) { in _rtl8821ae_phy_store_txpower_by_rate_base()
1328 for (rfPath = RF90_PATH_A; rfPath <= RF90_PATH_B; ++rfPath) { in _rtl8821ae_phy_convert_txpower_dbm_to_relative_value()
2038 case RF90_PATH_B: in rtl8812ae_phy_config_rf_with_headerfile()
2140 case RF90_PATH_B: in rtl8821ae_phy_config_rf_with_headerfile()
2193 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_definition()
2196 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_definition()
2199 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_definition()
2202 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = RB_LSSIWRITE_8821A; in phy_init_bb_rf_register_definition()
2205 rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RHSSIREAD_8821AE; in phy_init_bb_rf_register_definition()
2208 rtlphy->phyreg_def[RF90_PATH_B].rf_rb = RB_SIREAD_8821A; in phy_init_bb_rf_register_definition()
2211 rtlphy->phyreg_def[RF90_PATH_B].rf_rbpi = RB_PIREAD_8821A; in phy_init_bb_rf_register_definition()
2979 } else if (path == RF90_PATH_B) { in _rtl8821ae_phy_set_txpower_index()
3223 _rtl8821ae_get_txpower_index(hw, RF90_PATH_B, in _rtl8821ae_phy_txpower_training_by_path()
3707 rfb_backup[i] = rtl_get_rfreg(hw, RF90_PATH_B, backup_rf_reg[i], in _rtl8821ae_iqk_backup_rf()