Lines Matching refs:rtl_set_bbreg
141 rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2); in _rtl8723e_phy_bb_config_1t()
142 rtl_set_bbreg(hw, RFPGA1_TXINFO, 0x300033, 0x200022); in _rtl8723e_phy_bb_config_1t()
143 rtl_set_bbreg(hw, RCCK0_AFESETTING, MASKBYTE3, 0x45); in _rtl8723e_phy_bb_config_1t()
144 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x23); in _rtl8723e_phy_bb_config_1t()
145 rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, 0x30, 0x1); in _rtl8723e_phy_bb_config_1t()
146 rtl_set_bbreg(hw, 0xe74, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
147 rtl_set_bbreg(hw, 0xe78, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
148 rtl_set_bbreg(hw, 0xe7c, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
149 rtl_set_bbreg(hw, 0xe80, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
150 rtl_set_bbreg(hw, 0xe88, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
291 rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD, in _rtl8723e_phy_config_bb_with_headerfile()
301 rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD, in _rtl8723e_phy_config_bb_with_headerfile()
801 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0); in rtl8723e_phy_set_bw_mode_callback()
802 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0); in rtl8723e_phy_set_bw_mode_callback()
803 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1); in rtl8723e_phy_set_bw_mode_callback()
806 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1); in rtl8723e_phy_set_bw_mode_callback()
807 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1); in rtl8723e_phy_set_bw_mode_callback()
809 rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND, in rtl8723e_phy_set_bw_mode_callback()
811 rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc); in rtl8723e_phy_set_bw_mode_callback()
812 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0); in rtl8723e_phy_set_bw_mode_callback()
814 rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)), in rtl8723e_phy_set_bw_mode_callback()
1043 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c1f); in _rtl8723e_phy_path_a_iqk()
1044 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x10008c1f); in _rtl8723e_phy_path_a_iqk()
1045 rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x82140102); in _rtl8723e_phy_path_a_iqk()
1046 rtl_set_bbreg(hw, 0xe3c, MASKDWORD, in _rtl8723e_phy_path_a_iqk()
1050 rtl_set_bbreg(hw, 0xe50, MASKDWORD, 0x10008c22); in _rtl8723e_phy_path_a_iqk()
1051 rtl_set_bbreg(hw, 0xe54, MASKDWORD, 0x10008c22); in _rtl8723e_phy_path_a_iqk()
1052 rtl_set_bbreg(hw, 0xe58, MASKDWORD, 0x82140102); in _rtl8723e_phy_path_a_iqk()
1053 rtl_set_bbreg(hw, 0xe5c, MASKDWORD, 0x28160202); in _rtl8723e_phy_path_a_iqk()
1056 rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x001028d1); in _rtl8723e_phy_path_a_iqk()
1057 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000); in _rtl8723e_phy_path_a_iqk()
1058 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000); in _rtl8723e_phy_path_a_iqk()
1086 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000002); in _rtl8723e_phy_path_b_iqk()
1087 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000000); in _rtl8723e_phy_path_b_iqk()
1204 rtl_set_bbreg(hw, 0xc04, MASKDWORD, 0x03a05600); in _rtl8723e_phy_iq_calibrate()
1205 rtl_set_bbreg(hw, 0xc08, MASKDWORD, 0x000800e4); in _rtl8723e_phy_iq_calibrate()
1206 rtl_set_bbreg(hw, 0x874, MASKDWORD, 0x22204000); in _rtl8723e_phy_iq_calibrate()
1208 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000); in _rtl8723e_phy_iq_calibrate()
1209 rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00010000); in _rtl8723e_phy_iq_calibrate()
1213 rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x00080000); in _rtl8723e_phy_iq_calibrate()
1215 rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x00080000); in _rtl8723e_phy_iq_calibrate()
1216 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl8723e_phy_iq_calibrate()
1217 rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x01007c00); in _rtl8723e_phy_iq_calibrate()
1218 rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x01004800); in _rtl8723e_phy_iq_calibrate()
1271 rtl_set_bbreg(hw, 0xc04, MASKDWORD, rtlphy->reg_c04); in _rtl8723e_phy_iq_calibrate()
1272 rtl_set_bbreg(hw, 0x874, MASKDWORD, rtlphy->reg_874); in _rtl8723e_phy_iq_calibrate()
1273 rtl_set_bbreg(hw, 0xc08, MASKDWORD, rtlphy->reg_c08); in _rtl8723e_phy_iq_calibrate()
1274 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0); in _rtl8723e_phy_iq_calibrate()
1275 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00032ed3); in _rtl8723e_phy_iq_calibrate()
1277 rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00032ed3); in _rtl8723e_phy_iq_calibrate()
1339 rtl_set_bbreg(hw, REG_LEDCFG0, BIT(23), 0x01); in _rtl8723e_phy_set_rfpath_switch()
1340 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(13), 0x01); in _rtl8723e_phy_set_rfpath_switch()
1344 rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE, in _rtl8723e_phy_set_rfpath_switch()
1347 rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE, in _rtl8723e_phy_set_rfpath_switch()
1351 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x2); in _rtl8723e_phy_set_rfpath_switch()
1353 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x1); in _rtl8723e_phy_set_rfpath_switch()