196 	rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);  in rtl8723e_dm_false_alarm_counter_statistics()
208 	rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);  in rtl8723e_dm_false_alarm_counter_statistics()
209 	rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);  in rtl8723e_dm_false_alarm_counter_statistics()
210 	rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);  in rtl8723e_dm_false_alarm_counter_statistics()
211 	rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);  in rtl8723e_dm_false_alarm_counter_statistics()
405 					rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,  in rtl8723e_dm_cck_packet_detection_thresh()
408 					rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,  in rtl8723e_dm_cck_packet_detection_thresh()
415 			rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);  in rtl8723e_dm_cck_packet_detection_thresh()
418 			rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);  in rtl8723e_dm_cck_packet_detection_thresh()
419 			rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);  in rtl8723e_dm_cck_packet_detection_thresh()
554 		rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,  in rtl8723e_dm_write_dig()
556 		rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,  in rtl8723e_dm_write_dig()
724 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()
726 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()
728 			rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);  in rtl8723e_dm_rf_saving()
729 			rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,  in rtl8723e_dm_rf_saving()
731 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()
733 			rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);  in rtl8723e_dm_rf_saving()
734 			rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);  in rtl8723e_dm_rf_saving()
735 			rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);  in rtl8723e_dm_rf_saving()
737 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()
739 			rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),  in rtl8723e_dm_rf_saving()
741 			rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,  in rtl8723e_dm_rf_saving()
743 			rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);  in rtl8723e_dm_rf_saving()
744 			rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);  in rtl8723e_dm_rf_saving()
745 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()