90 	rtl_write_dword(rtlpriv, regaddr, data);  in rtl92s_phy_set_bb_reg()
421 			rtl_write_dword(rtlpriv, currentcmd->para1,  in _rtl92s_phy_sw_chnl_step_by_step()
1260 		rtl_write_dword(rtlpriv, WFM5, FW_RA_RESET);  in _rtl92s_phy_set_fwcmd_io()
1265 		rtl_write_dword(rtlpriv, WFM5, FW_RA_ACTIVE);  in _rtl92s_phy_set_fwcmd_io()
1271 		rtl_write_dword(rtlpriv, WFM5, input);  in _rtl92s_phy_set_fwcmd_io()
1273 		rtl_write_dword(rtlpriv, WFM5, FW_RA_ENABLE_RSSI_MASK);  in _rtl92s_phy_set_fwcmd_io()
1279 		rtl_write_dword(rtlpriv, WFM5, FW_RA_REFRESH);  in _rtl92s_phy_set_fwcmd_io()
1281 		rtl_write_dword(rtlpriv, WFM5, FW_RA_DISABLE_RSSI_MASK);  in _rtl92s_phy_set_fwcmd_io()
1288 		rtl_write_dword(rtlpriv, WFM5, input);  in _rtl92s_phy_set_fwcmd_io()
1295 		rtl_write_dword(rtlpriv, WFM5, input);  in _rtl92s_phy_set_fwcmd_io()
1300 		rtl_write_dword(rtlpriv, WFM5, FW_IQK_ENABLE);  in _rtl92s_phy_set_fwcmd_io()
1336 		rtl_write_dword(rtlpriv, WFM5, (FW_LPS_ENTER |  in _rtl92s_phy_set_fwcmd_io()
1344 		rtl_write_dword(rtlpriv, WFM5, FW_LPS_LEAVE);  in _rtl92s_phy_set_fwcmd_io()
1349 		rtl_write_dword(rtlpriv, WFM5, FW_ADD_A2_ENTRY);  in _rtl92s_phy_set_fwcmd_io()
1355 		rtl_write_dword(rtlpriv, WFM5, FW_CTRL_DM_BY_DRIVER);  in _rtl92s_phy_set_fwcmd_io()
1620 	rtl_write_dword(rtlpriv, 0x540, 0x73c11);  in rtl92s_phy_switch_ephy_parameter()
1621 	rtl_write_dword(rtlpriv, 0x548, 0x2407c);  in rtl92s_phy_switch_ephy_parameter()
1651 		rtl_write_dword(rtlpriv, WFM5, 0xF1000000 |  in rtl92s_phy_set_beacon_hwreg()
1655 		rtl_write_dword(rtlpriv, WFM3 + 4, new_bcn_num);  in rtl92s_phy_set_beacon_hwreg()
1656 		rtl_write_dword(rtlpriv, WFM3, 0xB026007C);  in rtl92s_phy_set_beacon_hwreg()