115 	if (rfpath == RF90_PATH_A)  in _rtl92s_phy_rf_serial_read()
135 	if (rfpath == RF90_PATH_A)  in _rtl92s_phy_rf_serial_read()
713 	rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW;  in _rtl92s_phy_init_register_definition()
719 	rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB;  in _rtl92s_phy_init_register_definition()
725 	rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE;  in _rtl92s_phy_init_register_definition()
731 	rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE;  in _rtl92s_phy_init_register_definition()
737 	rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset =  in _rtl92s_phy_init_register_definition()
747 	rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = RFPGA0_XAB_RFPARAMETER;  in _rtl92s_phy_init_register_definition()
753 	rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE;  in _rtl92s_phy_init_register_definition()
759 	rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para1 = RFPGA0_XA_HSSIPARAMETER1;  in _rtl92s_phy_init_register_definition()
765 	rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RFPGA0_XA_HSSIPARAMETER2;  in _rtl92s_phy_init_register_definition()
771 	rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL;  in _rtl92s_phy_init_register_definition()
777 	rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1;  in _rtl92s_phy_init_register_definition()
783 	rtlphy->phyreg_def[RF90_PATH_A].rfagc_control2 = ROFDM0_XAAGCCORE2;  in _rtl92s_phy_init_register_definition()
789 	rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbal = ROFDM0_XARXIQIMBALANCE;  in _rtl92s_phy_init_register_definition()
795 	rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE;  in _rtl92s_phy_init_register_definition()
801 	rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbal = ROFDM0_XATXIQIMBALANCE;  in _rtl92s_phy_init_register_definition()
807 	rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE;  in _rtl92s_phy_init_register_definition()
813 	rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RFPGA0_XA_LSSIREADBACK;  in _rtl92s_phy_init_register_definition()
819 	rtlphy->phyreg_def[RF90_PATH_A].rf_rbpi = TRANSCEIVERA_HSPI_READBACK;  in _rtl92s_phy_init_register_definition()
1005 	case RF90_PATH_A:  in rtl92s_phy_config_rf()