Lines Matching refs:rtlphy
163 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_rf_serial_read() local
164 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf_serial_read()
213 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_rf_serial_write() local
214 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf_serial_write()
407 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_init_tx_power_by_rate() local
415 rtlphy->tx_power_by_rate_offset in _rtl92ee_phy_init_tx_power_by_rate()
425 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_set_txpower_by_rate_base() local
436 rtlphy->txpwr_by_rate_base_24g[path][txnum][0] = value; in _rtl92ee_phy_set_txpower_by_rate_base()
439 rtlphy->txpwr_by_rate_base_24g[path][txnum][1] = value; in _rtl92ee_phy_set_txpower_by_rate_base()
442 rtlphy->txpwr_by_rate_base_24g[path][txnum][2] = value; in _rtl92ee_phy_set_txpower_by_rate_base()
445 rtlphy->txpwr_by_rate_base_24g[path][txnum][3] = value; in _rtl92ee_phy_set_txpower_by_rate_base()
464 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_get_txpower_by_rate_base() local
476 value = rtlphy->txpwr_by_rate_base_24g[path][txnum][0]; in _rtl92ee_phy_get_txpower_by_rate_base()
479 value = rtlphy->txpwr_by_rate_base_24g[path][txnum][1]; in _rtl92ee_phy_get_txpower_by_rate_base()
482 value = rtlphy->txpwr_by_rate_base_24g[path][txnum][2]; in _rtl92ee_phy_get_txpower_by_rate_base()
485 value = rtlphy->txpwr_by_rate_base_24g[path][txnum][3]; in _rtl92ee_phy_get_txpower_by_rate_base()
503 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_store_txpower_by_rate_base() local
509 raw = (u16)(rtlphy->tx_power_by_rate_offset in _rtl92ee_phy_store_txpower_by_rate_base()
517 raw = (u16)(rtlphy->tx_power_by_rate_offset in _rtl92ee_phy_store_txpower_by_rate_base()
525 raw = (u16)(rtlphy->tx_power_by_rate_offset in _rtl92ee_phy_store_txpower_by_rate_base()
531 raw = (u16)(rtlphy->tx_power_by_rate_offset in _rtl92ee_phy_store_txpower_by_rate_base()
538 raw = (u16)(rtlphy->tx_power_by_rate_offset in _rtl92ee_phy_store_txpower_by_rate_base()
574 struct rtl_phy *rtlphy = &rtlpriv->phy; in phy_convert_txpwr_dbm_to_rel_val() local
583 &rtlphy->tx_power_by_rate_offset in phy_convert_txpwr_dbm_to_rel_val()
587 &rtlphy->tx_power_by_rate_offset in phy_convert_txpwr_dbm_to_rel_val()
595 &rtlphy->tx_power_by_rate_offset in phy_convert_txpwr_dbm_to_rel_val()
599 &rtlphy->tx_power_by_rate_offset in phy_convert_txpwr_dbm_to_rel_val()
606 &rtlphy->tx_power_by_rate_offset[band][rf][RF_1TX][0], in phy_convert_txpwr_dbm_to_rel_val()
609 &rtlphy->tx_power_by_rate_offset[band][rf][RF_1TX][1], in phy_convert_txpwr_dbm_to_rel_val()
616 &rtlphy->tx_power_by_rate_offset[band][rf][RF_1TX][4], in phy_convert_txpwr_dbm_to_rel_val()
619 &rtlphy->tx_power_by_rate_offset[band][rf][RF_1TX][5], in phy_convert_txpwr_dbm_to_rel_val()
626 &rtlphy->tx_power_by_rate_offset[band][rf][RF_2TX][6], in phy_convert_txpwr_dbm_to_rel_val()
630 &rtlphy->tx_power_by_rate_offset[band][rf][RF_2TX][7], in phy_convert_txpwr_dbm_to_rel_val()
647 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_bb8192ee_config_parafile() local
659 rtlphy->pwrgroup_cnt = 0; in _rtl92ee_phy_bb8192ee_config_parafile()
673 rtlphy->cck_high_power = (bool)(rtl_get_bbreg(hw, in _rtl92ee_phy_bb8192ee_config_parafile()
867 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_store_tx_power_by_rate() local
885 rtlphy->tx_power_by_rate_offset[band][rfpath][txnum][section] = data; in _rtl92ee_store_tx_power_by_rate()
1042 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_get_hw_reg_originalvalue() local
1044 rtlphy->default_initialgain[0] = in rtl92ee_phy_get_hw_reg_originalvalue()
1046 rtlphy->default_initialgain[1] = in rtl92ee_phy_get_hw_reg_originalvalue()
1048 rtlphy->default_initialgain[2] = in rtl92ee_phy_get_hw_reg_originalvalue()
1050 rtlphy->default_initialgain[3] = in rtl92ee_phy_get_hw_reg_originalvalue()
1055 rtlphy->default_initialgain[0], in rtl92ee_phy_get_hw_reg_originalvalue()
1056 rtlphy->default_initialgain[1], in rtl92ee_phy_get_hw_reg_originalvalue()
1057 rtlphy->default_initialgain[2], in rtl92ee_phy_get_hw_reg_originalvalue()
1058 rtlphy->default_initialgain[3]); in rtl92ee_phy_get_hw_reg_originalvalue()
1060 rtlphy->framesync = (u8)rtl_get_bbreg(hw, in rtl92ee_phy_get_hw_reg_originalvalue()
1062 rtlphy->framesync_c34 = rtl_get_bbreg(hw, in rtl92ee_phy_get_hw_reg_originalvalue()
1067 ROFDM0_RXDETECTOR3, rtlphy->framesync); in rtl92ee_phy_get_hw_reg_originalvalue()
1073 struct rtl_phy *rtlphy = &rtlpriv->phy; in phy_init_bb_rf_register_def() local
1075 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_def()
1076 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_def()
1078 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_def()
1079 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_def()
1081 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_def()
1082 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_def()
1084 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in phy_init_bb_rf_register_def()
1086 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in phy_init_bb_rf_register_def()
1089 rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RFPGA0_XA_HSSIPARAMETER2; in phy_init_bb_rf_register_def()
1090 rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RFPGA0_XB_HSSIPARAMETER2; in phy_init_bb_rf_register_def()
1092 rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RFPGA0_XA_LSSIREADBACK; in phy_init_bb_rf_register_def()
1093 rtlphy->phyreg_def[RF90_PATH_B].rf_rb = RFPGA0_XB_LSSIREADBACK; in phy_init_bb_rf_register_def()
1095 rtlphy->phyreg_def[RF90_PATH_A].rf_rbpi = TRANSCEIVEA_HSPI_READBACK; in phy_init_bb_rf_register_def()
1096 rtlphy->phyreg_def[RF90_PATH_B].rf_rbpi = TRANSCEIVEB_HSPI_READBACK; in phy_init_bb_rf_register_def()
1102 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_get_txpower_level() local
1106 txpwr_level = rtlphy->cur_cck_txpwridx; in rtl92ee_phy_get_txpower_level()
1109 txpwr_level = rtlphy->cur_ofdm24g_txpwridx; in rtl92ee_phy_get_txpower_level()
1114 txpwr_level = rtlphy->cur_ofdm24g_txpwridx; in rtl92ee_phy_get_txpower_level()
1190 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_get_txpower_by_rate() local
1246 diff = (u8)(rtlphy->tx_power_by_rate_offset[band][rf][tx_num][sec] >> in _rtl92ee_get_txpower_by_rate()
1572 struct rtl_phy *rtlphy = &rtlpriv->phy; in phy_set_txpower_index_by_rate_section() local
1579 rtlphy->current_chan_bw, in phy_set_txpower_index_by_rate_section()
1587 rtlphy->current_chan_bw, in phy_set_txpower_index_by_rate_section()
1595 rtlphy->current_chan_bw, in phy_set_txpower_index_by_rate_section()
1603 rtlphy->current_chan_bw, in phy_set_txpower_index_by_rate_section()
1613 struct rtl_phy *rtlphy = &rtl_priv(hw)->phy; in rtl92ee_phy_set_txpower_level() local
1618 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath; in rtl92ee_phy_set_txpower_level()
1628 if (rtlphy->num_total_rfpath >= 2) in rtl92ee_phy_set_txpower_level()
1689 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_set_bw_mode_callback() local
1696 rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ? in rtl92ee_phy_set_bw_mode_callback()
1700 rtlphy->set_bwmode_inprogress = false; in rtl92ee_phy_set_bw_mode_callback()
1707 switch (rtlphy->current_chan_bw) { in rtl92ee_phy_set_bw_mode_callback()
1721 "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); in rtl92ee_phy_set_bw_mode_callback()
1725 switch (rtlphy->current_chan_bw) { in rtl92ee_phy_set_bw_mode_callback()
1746 "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); in rtl92ee_phy_set_bw_mode_callback()
1749 rtl92ee_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); in rtl92ee_phy_set_bw_mode_callback()
1750 rtlphy->set_bwmode_inprogress = false; in rtl92ee_phy_set_bw_mode_callback()
1758 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_set_bw_mode() local
1760 u8 tmp_bw = rtlphy->current_chan_bw; in rtl92ee_phy_set_bw_mode()
1762 if (rtlphy->set_bwmode_inprogress) in rtl92ee_phy_set_bw_mode()
1764 rtlphy->set_bwmode_inprogress = true; in rtl92ee_phy_set_bw_mode()
1770 rtlphy->set_bwmode_inprogress = false; in rtl92ee_phy_set_bw_mode()
1771 rtlphy->current_chan_bw = tmp_bw; in rtl92ee_phy_set_bw_mode()
1779 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_sw_chnl_callback() local
1783 "switch to channel%d\n", rtlphy->current_channel); in rtl92ee_phy_sw_chnl_callback()
1787 if (!rtlphy->sw_chnl_inprogress) in rtl92ee_phy_sw_chnl_callback()
1790 (hw, rtlphy->current_channel, &rtlphy->sw_chnl_stage, in rtl92ee_phy_sw_chnl_callback()
1791 &rtlphy->sw_chnl_step, &delay)) { in rtl92ee_phy_sw_chnl_callback()
1797 rtlphy->sw_chnl_inprogress = false; in rtl92ee_phy_sw_chnl_callback()
1807 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_sw_chnl() local
1810 if (rtlphy->sw_chnl_inprogress) in rtl92ee_phy_sw_chnl()
1812 if (rtlphy->set_bwmode_inprogress) in rtl92ee_phy_sw_chnl()
1814 RT_ASSERT((rtlphy->current_channel <= 14), in rtl92ee_phy_sw_chnl()
1816 rtlphy->sw_chnl_inprogress = true; in rtl92ee_phy_sw_chnl()
1817 rtlphy->sw_chnl_stage = 0; in rtl92ee_phy_sw_chnl()
1818 rtlphy->sw_chnl_step = 0; in rtl92ee_phy_sw_chnl()
1823 rtlphy->current_channel); in rtl92ee_phy_sw_chnl()
1824 rtlphy->sw_chnl_inprogress = false; in rtl92ee_phy_sw_chnl()
1828 rtlphy->sw_chnl_inprogress = false; in rtl92ee_phy_sw_chnl()
1838 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_sw_chnl_step_by_step() local
1847 u8 num_total_rfpath = rtlphy->num_total_rfpath; in _rtl92ee_phy_sw_chnl_step_by_step()
1918 rtlphy->rfreg_chnlval[rfpath] = in _rtl92ee_phy_sw_chnl_step_by_step()
1919 ((rtlphy->rfreg_chnlval[rfpath] & in _rtl92ee_phy_sw_chnl_step_by_step()
1925 rtlphy->rfreg_chnlval[rfpath]); in _rtl92ee_phy_sw_chnl_step_by_step()
2524 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_phy_iq_calibrate() local
2548 rtlphy->adda_backup, in _rtl92ee_phy_iq_calibrate()
2551 rtlphy->iqk_mac_backup); in _rtl92ee_phy_iq_calibrate()
2553 rtlphy->iqk_bb_backup, in _rtl92ee_phy_iq_calibrate()
2571 rtlphy->iqk_mac_backup); in _rtl92ee_phy_iq_calibrate()
2684 rtlphy->adda_backup, in _rtl92ee_phy_iq_calibrate()
2689 rtlphy->iqk_mac_backup); in _rtl92ee_phy_iq_calibrate()
2692 rtlphy->iqk_bb_backup, in _rtl92ee_phy_iq_calibrate()
2831 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_iq_calibrate() local
2853 rtlphy->iqk_bb_backup, 9); in rtl92ee_phy_iq_calibrate()
2916 rtlphy->reg_e94 = reg_e94; in rtl92ee_phy_iq_calibrate()
2918 rtlphy->reg_e9c = reg_e9c; in rtl92ee_phy_iq_calibrate()
2922 rtlphy->reg_eb4 = reg_eb4; in rtl92ee_phy_iq_calibrate()
2924 rtlphy->reg_ebc = reg_ebc; in rtl92ee_phy_iq_calibrate()
2930 rtlphy->reg_e94 = 0x100; in rtl92ee_phy_iq_calibrate()
2931 rtlphy->reg_eb4 = 0x100; in rtl92ee_phy_iq_calibrate()
2932 rtlphy->reg_e9c = 0x0; in rtl92ee_phy_iq_calibrate()
2933 rtlphy->reg_ebc = 0x0; in rtl92ee_phy_iq_calibrate()
2945 idx = rtl92ee_get_rightchnlplace_for_iqk(rtlphy->current_channel); in rtl92ee_phy_iq_calibrate()
2950 rtlphy->iqk_matrix[idx].value[0][i] = in rtl92ee_phy_iq_calibrate()
2953 rtlphy->iqk_matrix[idx].iqk_done = true; in rtl92ee_phy_iq_calibrate()
2956 rtlphy->iqk_bb_backup, 9); in rtl92ee_phy_iq_calibrate()
2962 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_lc_calibrate() local
2971 rtlphy->lck_inprogress = true; in rtl92ee_phy_lc_calibrate()
2978 rtlphy->lck_inprogress = false; in rtl92ee_phy_lc_calibrate()
2993 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_set_io_cmd() local
2998 iotype, rtlphy->set_io_inprogress); in rtl92ee_phy_set_io_cmd()
3017 if (postprocessing && !rtlphy->set_io_inprogress) { in rtl92ee_phy_set_io_cmd()
3018 rtlphy->set_io_inprogress = true; in rtl92ee_phy_set_io_cmd()
3019 rtlphy->current_io_type = iotype; in rtl92ee_phy_set_io_cmd()
3031 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_phy_set_io() local
3036 rtlphy->current_io_type, rtlphy->set_io_inprogress); in rtl92ee_phy_set_io()
3037 switch (rtlphy->current_io_type) { in rtl92ee_phy_set_io()
3039 rtl92ee_dm_write_dig(hw, rtlphy->initgain_backup.xaagccore1); in rtl92ee_phy_set_io()
3040 rtl92ee_dm_write_cck_cca_thres(hw, rtlphy->initgain_backup.cca); in rtl92ee_phy_set_io()
3042 rtl92ee_phy_set_txpower_level(hw, rtlphy->current_channel); in rtl92ee_phy_set_io()
3046 rtlphy->initgain_backup.xaagccore1 = dm_dig->cur_igvalue; in rtl92ee_phy_set_io()
3048 rtlphy->initgain_backup.cca = dm_dig->cur_cck_cca_thres; in rtl92ee_phy_set_io()
3056 rtlphy->set_io_inprogress = false; in rtl92ee_phy_set_io()
3058 "(%#x)\n", rtlphy->current_io_type); in rtl92ee_phy_set_io()