581 		rtl_write_dword(rtlpriv, REG_RCR, ((u32 *)(val))[0]);  in rtl92ee_set_hw_reg()
667 		rtl_write_dword(rtlpriv, REG_TSFTR,  in rtl92ee_set_hw_reg()
669 		rtl_write_dword(rtlpriv, REG_TSFTR + 4,  in rtl92ee_set_hw_reg()
701 	rtl_write_dword(rtlpriv, REG_RQPN, 0x80E90808);  in _rtl92ee_llt_table_init()
777 	rtl_write_dword(rtlpriv, REG_AFE_CTRL4, dwordtmp);  in _rtl92ee_init_mac()
788 	rtl_write_dword(rtlpriv, REG_AFE_CTRL4, dwordtmp);  in _rtl92ee_init_mac()
824 	rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);  in _rtl92ee_init_mac()
825 	rtl_write_dword(rtlpriv, REG_HISRE, 0xffffffff);  in _rtl92ee_init_mac()
835 	rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config);  in _rtl92ee_init_mac()
839 	rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config);  in _rtl92ee_init_mac()
842 	rtl_write_dword(rtlpriv, REG_BCNQ_DESA,  in _rtl92ee_init_mac()
845 	rtl_write_dword(rtlpriv, REG_MGQ_DESA,  in _rtl92ee_init_mac()
848 	rtl_write_dword(rtlpriv, REG_VOQ_DESA,  in _rtl92ee_init_mac()
851 	rtl_write_dword(rtlpriv, REG_VIQ_DESA,  in _rtl92ee_init_mac()
855 	rtl_write_dword(rtlpriv, REG_BEQ_DESA,  in _rtl92ee_init_mac()
861 	rtl_write_dword(rtlpriv, REG_BKQ_DESA,  in _rtl92ee_init_mac()
864 	rtl_write_dword(rtlpriv, REG_HQ0_DESA,  in _rtl92ee_init_mac()
868 	rtl_write_dword(rtlpriv, REG_RX_DESA,  in _rtl92ee_init_mac()
876 	rtl_write_dword(rtlpriv, REG_TSFTIMER_HCI, 0x3fffffff);  in _rtl92ee_init_mac()
881 	rtl_write_dword(rtlpriv, REG_INT_MIG, 0);  in _rtl92ee_init_mac()
883 	rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0);  in _rtl92ee_init_mac()
924 	rtl_write_dword(rtlpriv, REG_TSFTIMER_HCI, 0XFFFFFFFF);  in _rtl92ee_init_mac()
938 	rtl_write_dword(rtlpriv, REG_RRSR, reg_rrsr);  in _rtl92ee_hw_configure()
941 	rtl_write_dword(rtlpriv, REG_ARFR0, 0x00000010);  in _rtl92ee_hw_configure()
942 	rtl_write_dword(rtlpriv, REG_ARFR0 + 4, 0x3e0ff000);  in _rtl92ee_hw_configure()
945 	rtl_write_dword(rtlpriv, REG_ARFR1, 0x00000010);  in _rtl92ee_hw_configure()
946 	rtl_write_dword(rtlpriv, REG_ARFR1 + 4, 0x000ff000);  in _rtl92ee_hw_configure()
958 	rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x0201ffff);  in _rtl92ee_hw_configure()
961 	rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000);  in _rtl92ee_hw_configure()
962 	rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504);  in _rtl92ee_hw_configure()
963 	rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000);  in _rtl92ee_hw_configure()
964 	rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504);  in _rtl92ee_hw_configure()
990 	rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x03086666);  in _rtl92ee_hw_configure()
1013 	rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff);  in _rtl92ee_hw_configure()
1014 	rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff);  in _rtl92ee_hw_configure()
1038 			rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA,  in _rtl92ee_enable_aspm_back_door()
1066 		rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA,  in _rtl92ee_enable_aspm_back_door()
1091 		rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA,  in _rtl92ee_enable_aspm_back_door()
1419 	rtl_write_dword(rtlpriv, REG_SYS_SWR_CTRL1, tmp_u4b);  in rtl92ee_hw_init()
1423 	rtl_write_dword(rtlpriv, 0x4fc, 0);  in rtl92ee_hw_init()
1570 		rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f);  in rtl92ee_set_qos()
1576 		rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322);  in rtl92ee_set_qos()
1579 		rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222);  in rtl92ee_set_qos()
1592 	rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);  in rtl92ee_enable_interrupt()
1593 	rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);  in rtl92ee_enable_interrupt()
1602 	rtl_write_dword(rtlpriv, REG_HIMR, IMR_DISABLED);  in rtl92ee_disable_interrupt()
1603 	rtl_write_dword(rtlpriv, REG_HIMRE, IMR_DISABLED);  in rtl92ee_disable_interrupt()
1682 	rtl_write_dword(rtlpriv, ISR, *p_inta);  in rtl92ee_interrupt_recognized()
1685 	rtl_write_dword(rtlpriv, REG_HISRE, *p_intb);  in rtl92ee_interrupt_recognized()
2661 		rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config);  in rtl92ee_allow_all_destaddr()