Lines Matching refs:rtl_write_byte
54 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlpci->reg_bcn_ctrl_val); in _rtl92ee_set_bcn_ctrl_reg()
63 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp & (~BIT(6))); in _rtl92ee_stop_tx_beacon()
64 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in _rtl92ee_stop_tx_beacon()
67 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp); in _rtl92ee_stop_tx_beacon()
76 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp | BIT(6)); in _rtl92ee_resume_tx_beacon()
77 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ee_resume_tx_beacon()
80 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp); in _rtl92ee_resume_tx_beacon()
358 rtl_write_byte(rtlpriv, REG_CR + 1, tmp_regcr | BIT(0)); in _rtl92ee_download_rsvd_page()
372 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp_reg422 & (~BIT(6))); in _rtl92ee_download_rsvd_page()
380 rtl_write_byte(rtlpriv, REG_DWBCN0_CTRL + 2, in _rtl92ee_download_rsvd_page()
393 rtl_write_byte(rtlpriv, REG_MGQ_TXBD_NUM + 3, in _rtl92ee_download_rsvd_page()
407 rtl_write_byte(rtlpriv, REG_DWBCN0_CTRL + 2, BIT(0)); in _rtl92ee_download_rsvd_page()
421 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp_reg422); in _rtl92ee_download_rsvd_page()
424 rtl_write_byte(rtlpriv, REG_CR + 1, tmp_regcr & (~BIT(0))); in _rtl92ee_download_rsvd_page()
439 rtl_write_byte(rtlpriv, (REG_MACID + idx), val[idx]); in rtl92ee_set_hw_reg()
447 rtl_write_byte(rtlpriv, REG_RRSR, b_rate_cfg & 0xff); in rtl92ee_set_hw_reg()
448 rtl_write_byte(rtlpriv, REG_RRSR + 1, (b_rate_cfg >> 8) & 0xff); in rtl92ee_set_hw_reg()
452 rtl_write_byte(rtlpriv, (REG_BSSID + idx), val[idx]); in rtl92ee_set_hw_reg()
455 rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); in rtl92ee_set_hw_reg()
456 rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]); in rtl92ee_set_hw_reg()
458 rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); in rtl92ee_set_hw_reg()
459 rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); in rtl92ee_set_hw_reg()
473 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); in rtl92ee_set_hw_reg()
487 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp); in rtl92ee_set_hw_reg()
492 rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *)val)); in rtl92ee_set_hw_reg()
513 rtl_write_byte(rtlpriv, in rtl92ee_set_hw_reg()
577 rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); in rtl92ee_set_hw_reg()
594 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); in rtl92ee_set_hw_reg()
612 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, (*(u8 *)val)); in rtl92ee_set_hw_reg()
614 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, in rtl92ee_set_hw_reg()
703 rtl_write_byte(rtlpriv, REG_TRXFF_BNDY, txpktbuf_bndy); in _rtl92ee_llt_table_init()
706 rtl_write_byte(rtlpriv, REG_DWBCN0_CTRL + 1, txpktbuf_bndy); in _rtl92ee_llt_table_init()
707 rtl_write_byte(rtlpriv, REG_DWBCN1_CTRL + 1, txpktbuf_bndy); in _rtl92ee_llt_table_init()
709 rtl_write_byte(rtlpriv, REG_BCNQ_BDNY, txpktbuf_bndy); in _rtl92ee_llt_table_init()
710 rtl_write_byte(rtlpriv, REG_BCNQ1_BDNY, txpktbuf_bndy); in _rtl92ee_llt_table_init()
712 rtl_write_byte(rtlpriv, REG_MGQ_BDNY, txpktbuf_bndy); in _rtl92ee_llt_table_init()
713 rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy); in _rtl92ee_llt_table_init()
715 rtl_write_byte(rtlpriv, REG_PBP, 0x31); in _rtl92ee_llt_table_init()
716 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4); in _rtl92ee_llt_table_init()
719 rtl_write_byte(rtlpriv, REG_AUTO_LLT + 2, u8tmp | BIT(0)); in _rtl92ee_llt_table_init()
760 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0); in _rtl92ee_init_mac()
764 rtl_write_byte(rtlpriv, 0x7c, 0xc3); in _rtl92ee_init_mac()
767 rtl_write_byte(rtlpriv, 0x16, bytetmp | BIT(4) | BIT(6)); in _rtl92ee_init_mac()
768 rtl_write_byte(rtlpriv, 0x7c, 0x83); in _rtl92ee_init_mac()
773 rtl_write_byte(rtlpriv, REG_AFE_CTRL2, bytetmp); in _rtl92ee_init_mac()
784 rtl_write_byte(rtlpriv, REG_AFE_CTRL2, bytetmp); in _rtl92ee_init_mac()
802 rtl_write_byte(rtlpriv, REG_CR, bytetmp); in _rtl92ee_init_mac()
805 rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, bytetmp); in _rtl92ee_init_mac()
810 rtl_write_byte(rtlpriv, REG_SYS_CLKR, bytetmp | BIT(3)); in _rtl92ee_init_mac()
812 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG + 1, bytetmp & (~BIT(4))); in _rtl92ee_init_mac()
832 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F); in _rtl92ee_init_mac()
879 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, bytetmp | 0xF7); in _rtl92ee_init_mac()
949 rtl_write_byte(rtlpriv, REG_SLOT, 0x09); in _rtl92ee_hw_configure()
967 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); in _rtl92ee_hw_configure()
968 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); in _rtl92ee_hw_configure()
971 rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val); in _rtl92ee_hw_configure()
978 rtl_write_byte(rtlpriv, REG_BCN_CTRL_1, 0); in _rtl92ee_hw_configure()
981 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); /* 8 ms */ in _rtl92ee_hw_configure()
983 rtl_write_byte(rtlpriv, REG_PIFS, 0); in _rtl92ee_hw_configure()
984 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); in _rtl92ee_hw_configure()
993 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); in _rtl92ee_hw_configure()
1008 rtl_write_byte(rtlpriv, REG_RX_PKT_LIMIT, 0x20); in _rtl92ee_hw_configure()
1025 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x2); in _rtl92ee_enable_aspm_back_door()
1041 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x1); in _rtl92ee_enable_aspm_back_door()
1056 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x2); in _rtl92ee_enable_aspm_back_door()
1069 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x1); in _rtl92ee_enable_aspm_back_door()
1081 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x2); in _rtl92ee_enable_aspm_back_door()
1094 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x1); in _rtl92ee_enable_aspm_back_door()
1132 rtl_write_byte(rtlpriv, REG_CR + 1, tmp | BIT(1)); in rtl92ee_enable_hw_security_config()
1147 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 3, in _rtl8192ee_check_pcie_dma_hang()
1184 rtl_write_byte(rtlpriv, REG_RSV_CTRL, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1187 rtl_write_byte(rtlpriv, REG_PMC_DBG_CTRL2, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1198 rtl_write_byte(rtlpriv, REG_RXDMA_CONTROL, (tmp | BIT(2))); in _rtl8192ee_reset_pcie_interface_dma()
1204 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0xFF); in _rtl8192ee_reset_pcie_interface_dma()
1210 rtl_write_byte(rtlpriv, REG_CR, 0); in _rtl8192ee_reset_pcie_interface_dma()
1218 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1225 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1231 rtl_write_byte(rtlpriv, REG_CR, 0xFF); in _rtl8192ee_reset_pcie_interface_dma()
1244 rtl_write_byte(rtlpriv, REG_MAC_PHY_CTRL_NORMAL + 2, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1258 rtl_write_byte(rtlpriv, REG_RXDMA_CONTROL, in _rtl8192ee_reset_pcie_interface_dma()
1261 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, in _rtl8192ee_reset_pcie_interface_dma()
1270 rtl_write_byte(rtlpriv, REG_PMC_DBG_CTRL2, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1307 rtl_write_byte(rtlpriv, 0x577, 0x03); in rtl92ee_hw_init()
1310 rtl_write_byte(rtlpriv, REG_AFE_CTRL4, 0x2A); in rtl92ee_hw_init()
1311 rtl_write_byte(rtlpriv, REG_AFE_CTRL4 + 1, 0x00); in rtl92ee_hw_init()
1312 rtl_write_byte(rtlpriv, REG_AFE_CTRL2, 0x83); in rtl92ee_hw_init()
1316 rtl_write_byte(rtlpriv, 0x64, 0); in rtl92ee_hw_init()
1317 rtl_write_byte(rtlpriv, 0x65, 1); in rtl92ee_hw_init()
1413 rtl_write_byte(rtlpriv, REG_NAV_UPPER, ((30000 + 127) / 128)); in rtl92ee_hw_init()
1417 rtl_write_byte(rtlpriv, REG_SYS_SWR_CTRL2, 0x75); in rtl92ee_hw_init()
1513 rtl_write_byte(rtlpriv, MSR, bt_msr | mode); in _rtl92ee_set_media_status()
1516 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); in _rtl92ee_set_media_status()
1518 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); in _rtl92ee_set_media_status()
1622 rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00); in _rtl92ee_poweroff_adapter()
1630 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, (u1b_tmp & (~BIT(2)))); in _rtl92ee_poweroff_adapter()
1633 rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); in _rtl92ee_poweroff_adapter()
1641 rtl_write_byte(rtlpriv, REG_RSV_CTRL + 1, (u1b_tmp & (~BIT(0)))); in _rtl92ee_poweroff_adapter()
1643 rtl_write_byte(rtlpriv, REG_RSV_CTRL + 1, (u1b_tmp | BIT(0))); in _rtl92ee_poweroff_adapter()
1646 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0E); in _rtl92ee_poweroff_adapter()
1701 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x18); in rtl92ee_set_beacon_related_registers()
1702 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x18); in rtl92ee_set_beacon_related_registers()
1703 rtl_write_byte(rtlpriv, 0x606, 0x30); in rtl92ee_set_beacon_related_registers()
1705 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlpci->reg_bcn_ctrl_val); in rtl92ee_set_beacon_related_registers()