Lines Matching refs:rtl_write_byte
52 rtl_write_byte(rtlpriv, REG_DBI_FLAG, BIT(1) | direct); in rtl92de_read_dword_dbi()
65 rtl_write_byte(rtlpriv, REG_DBI_FLAG, BIT(0) | direct); in rtl92de_write_dword_dbi()
76 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8) rtlpci->reg_bcn_ctrl_val); in _rtl92de_set_bcn_ctrl_reg()
85 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte & (~BIT(6))); in _rtl92de_stop_tx_beacon()
86 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); in _rtl92de_stop_tx_beacon()
87 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in _rtl92de_stop_tx_beacon()
90 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92de_stop_tx_beacon()
99 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte | BIT(6)); in _rtl92de_resume_tx_beacon()
100 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0x0a); in _rtl92de_resume_tx_beacon()
101 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92de_resume_tx_beacon()
104 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92de_resume_tx_beacon()
187 rtl_write_byte(rtlpriv, (REG_MACID + idx), in rtl92de_set_hw_reg()
199 rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); in rtl92de_set_hw_reg()
200 rtl_write_byte(rtlpriv, REG_RRSR + 1, in rtl92de_set_hw_reg()
207 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, in rtl92de_set_hw_reg()
213 rtl_write_byte(rtlpriv, (REG_BSSID + idx), in rtl92de_set_hw_reg()
218 rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); in rtl92de_set_hw_reg()
219 rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]); in rtl92de_set_hw_reg()
220 rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); in rtl92de_set_hw_reg()
221 rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); in rtl92de_set_hw_reg()
234 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); in rtl92de_set_hw_reg()
248 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp); in rtl92de_set_hw_reg()
266 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92de_set_hw_reg()
280 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92de_set_hw_reg()
371 rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); in rtl92de_set_hw_reg()
387 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); in rtl92de_set_hw_reg()
399 rtl_write_byte(rtlpriv, REG_SECCFG, *val); in rtl92de_set_hw_reg()
418 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92de_set_hw_reg()
426 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, in rtl92de_set_hw_reg()
432 rtl_write_byte(rtlpriv, in rtl92de_set_hw_reg()
435 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92de_set_hw_reg()
559 rtl_write_byte(rtlpriv, REG_RQPN_NPQ, value8); in _rtl92de_llt_table_init()
570 rtl_write_byte(rtlpriv, REG_TDECTRL + 1, txpktbuf_bndy); in _rtl92de_llt_table_init()
574 rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); in _rtl92de_llt_table_init()
575 rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); in _rtl92de_llt_table_init()
579 rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy); in _rtl92de_llt_table_init()
585 rtl_write_byte(rtlpriv, REG_PBP, 0x11); in _rtl92de_llt_table_init()
588 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4); in _rtl92de_llt_table_init()
650 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00); in _rtl92de_init_mac()
651 rtl_write_byte(rtlpriv, REG_LDOA15_CTRL, 0x05); in _rtl92de_init_mac()
659 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b); in _rtl92de_init_mac()
662 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F); in _rtl92de_init_mac()
671 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, bytetmp); in _rtl92de_init_mac()
691 rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82); in _rtl92de_init_mac()
704 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0x0); in _rtl92de_init_mac()
717 rtl_write_byte(rtlpriv, REG_HISRE, 0xff); in _rtl92de_init_mac()
743 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F); in _rtl92de_init_mac()
757 rtl_write_byte(rtlpriv, 0x4d0, 0x0); in _rtl92de_init_mac()
775 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x33); in _rtl92de_init_mac()
782 rtl_write_byte(rtlpriv, REG_APSD_CTRL, bytetmp & ~BIT(6)); in _rtl92de_init_mac()
806 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, 0x8); in _rtl92de_hw_configure()
807 rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode); in _rtl92de_hw_configure()
809 rtl_write_byte(rtlpriv, REG_SLOT, 0x09); in _rtl92de_hw_configure()
810 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, 0x0); in _rtl92de_hw_configure()
814 rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF); in _rtl92de_hw_configure()
826 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); in _rtl92de_hw_configure()
827 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0x0a); in _rtl92de_hw_configure()
829 rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val); in _rtl92de_hw_configure()
830 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92de_hw_configure()
831 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C); in _rtl92de_hw_configure()
832 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); in _rtl92de_hw_configure()
837 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); in _rtl92de_hw_configure()
865 rtl_write_byte(rtlpriv, 0x34b, 0x93); in _rtl92de_enable_aspm_back_door()
867 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92de_enable_aspm_back_door()
869 rtl_write_byte(rtlpriv, 0x349, 0x1b); in _rtl92de_enable_aspm_back_door()
871 rtl_write_byte(rtlpriv, 0x349, 0x03); in _rtl92de_enable_aspm_back_door()
873 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92de_enable_aspm_back_door()
896 rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); in rtl92de_enable_hw_security_config()
941 rtl_write_byte(rtlpriv, 0x605, tmp_u1b); in rtl92de_hw_init()
949 rtl_write_byte(rtlpriv, 0x4d0, tmp_u1b); in rtl92de_hw_init()
951 rtl_write_byte(rtlpriv, 0x4d3, 0x80); in rtl92de_hw_init()
955 rtl_write_byte(rtlpriv, 0x605, tmp_u1b); in rtl92de_hw_init()
959 rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xff); in rtl92de_hw_init()
961 rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05); in rtl92de_hw_init()
1129 rtl_write_byte(rtlpriv, MSR, bt_msr); in _rtl92de_set_media_status()
1132 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); in _rtl92de_set_media_status()
1134 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); in _rtl92de_set_media_status()
1228 rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00); in _rtl92de_poweroff_adapter()
1233 rtl_write_byte(rtlpriv, REG_LDOA15_CTRL, 0x04); in _rtl92de_poweroff_adapter()
1239 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51); in _rtl92de_poweroff_adapter()
1242 rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); in _rtl92de_poweroff_adapter()
1266 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80); in _rtl92de_poweroff_adapter()
1269 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23); in _rtl92de_poweroff_adapter()
1272 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e); in _rtl92de_poweroff_adapter()
1275 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e); in _rtl92de_poweroff_adapter()
1285 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10); in _rtl92de_poweroff_adapter()
1298 rtl_write_byte(rtlpriv, REG_POWER_OFF_IN_PROCESS, u1b_tmp); in _rtl92de_poweroff_adapter()
1329 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0xFE); in rtl92de_card_disable()
1340 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); in rtl92de_card_disable()
1347 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); in rtl92de_card_disable()
1352 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0); in rtl92de_card_disable()
1357 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0xff); in rtl92de_card_disable()
1359 rtl_write_byte(rtlpriv, REG_CR, 0x0); in rtl92de_card_disable()
1393 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x20); in rtl92de_set_beacon_related_registers()
1395 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x30); in rtl92de_set_beacon_related_registers()
1397 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x20); in rtl92de_set_beacon_related_registers()
1398 rtl_write_byte(rtlpriv, 0x606, 0x30); in rtl92de_set_beacon_related_registers()
2131 rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, in rtl92de_gpio_radio_on_off_checking()
2305 rtl_write_byte(rtlpriv, REG_MAC_PHY_CTRL_NORMAL, in rtl92de_resume()