Lines Matching refs:rtl_write_byte
58 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlpci->reg_bcn_ctrl_val); in _rtl92ce_set_bcn_ctrl_reg()
67 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte & (~BIT(6))); in _rtl92ce_stop_tx_beacon()
68 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in _rtl92ce_stop_tx_beacon()
71 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92ce_stop_tx_beacon()
80 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte | BIT(6)); in _rtl92ce_resume_tx_beacon()
81 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_resume_tx_beacon()
84 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92ce_resume_tx_beacon()
165 rtl_write_byte(rtlpriv, (REG_MACID + idx), in rtl92ce_set_hw_reg()
175 rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); in rtl92ce_set_hw_reg()
176 rtl_write_byte(rtlpriv, REG_RRSR + 1, in rtl92ce_set_hw_reg()
182 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, in rtl92ce_set_hw_reg()
188 rtl_write_byte(rtlpriv, (REG_BSSID + idx), in rtl92ce_set_hw_reg()
194 rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); in rtl92ce_set_hw_reg()
195 rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]); in rtl92ce_set_hw_reg()
197 rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); in rtl92ce_set_hw_reg()
198 rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); in rtl92ce_set_hw_reg()
214 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); in rtl92ce_set_hw_reg()
230 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp); in rtl92ce_set_hw_reg()
254 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92ce_set_hw_reg()
269 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92ce_set_hw_reg()
308 rtl_write_byte(rtlpriv, in rtl92ce_set_hw_reg()
378 rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); in rtl92ce_set_hw_reg()
395 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); in rtl92ce_set_hw_reg()
407 rtl_write_byte(rtlpriv, REG_SECCFG, *val); in rtl92ce_set_hw_reg()
416 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val); in rtl92ce_set_hw_reg()
418 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, in rtl92ce_set_hw_reg()
448 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92ce_set_hw_reg()
459 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, in rtl92ce_set_hw_reg()
468 rtl_write_byte(rtlpriv, in rtl92ce_set_hw_reg()
473 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92ce_set_hw_reg()
614 rtl_write_byte(rtlpriv, REG_RQPN_NPQ, 0x1c); in _rtl92ce_llt_table_init()
629 rtl_write_byte(rtlpriv, REG_TDECTRL + 1, txpktbuf_bndy); in _rtl92ce_llt_table_init()
631 rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); in _rtl92ce_llt_table_init()
632 rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); in _rtl92ce_llt_table_init()
634 rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy); in _rtl92ce_llt_table_init()
635 rtl_write_byte(rtlpriv, REG_PBP, 0x11); in _rtl92ce_llt_table_init()
636 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4); in _rtl92ce_llt_table_init()
690 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00); in _rtl92ce_init_mac()
697 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b); in _rtl92ce_init_mac()
698 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F); in _rtl92ce_init_mac()
710 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, bytetmp); in _rtl92ce_init_mac()
731 rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82); in _rtl92ce_init_mac()
736 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL+2, bytetmp); in _rtl92ce_init_mac()
745 rtl_write_byte(rtlpriv, REG_HISRE, 0xff); in _rtl92ce_init_mac()
754 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F); in _rtl92ce_init_mac()
758 rtl_write_byte(rtlpriv, 0x4d0, 0x0); in _rtl92ce_init_mac()
782 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x77); in _rtl92ce_init_mac()
784 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x22); in _rtl92ce_init_mac()
789 rtl_write_byte(rtlpriv, REG_APSD_CTRL, bytetmp & ~BIT(6)); in _rtl92ce_init_mac()
813 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, 0x8); in _rtl92ce_hw_configure()
815 rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode); in _rtl92ce_hw_configure()
819 rtl_write_byte(rtlpriv, REG_SLOT, 0x09); in _rtl92ce_hw_configure()
821 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, 0x0); in _rtl92ce_hw_configure()
829 rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF); in _rtl92ce_hw_configure()
842 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); in _rtl92ce_hw_configure()
844 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); in _rtl92ce_hw_configure()
847 rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val); in _rtl92ce_hw_configure()
849 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_hw_configure()
851 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_hw_configure()
853 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C); in _rtl92ce_hw_configure()
854 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); in _rtl92ce_hw_configure()
871 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); in _rtl92ce_hw_configure()
890 rtl_write_byte(rtlpriv, 0x34b, 0x93); in _rtl92ce_enable_aspm_back_door()
892 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92ce_enable_aspm_back_door()
895 rtl_write_byte(rtlpriv, 0x349, 0x1b); in _rtl92ce_enable_aspm_back_door()
897 rtl_write_byte(rtlpriv, 0x349, 0x03); in _rtl92ce_enable_aspm_back_door()
900 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92ce_enable_aspm_back_door()
928 rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); in rtl92ce_enable_hw_security_config()
1052 rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x80); in rtl92ce_hw_init()
1054 rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x90); in rtl92ce_hw_init()
1225 rtl_write_byte(rtlpriv, MSR, bt_msr | mode); in _rtl92ce_set_media_status()
1229 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); in _rtl92ce_set_media_status()
1231 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); in _rtl92ce_set_media_status()
1330 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92ce_poweroff_adapter()
1332 rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00); in _rtl92ce_poweroff_adapter()
1333 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); in _rtl92ce_poweroff_adapter()
1334 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); in _rtl92ce_poweroff_adapter()
1335 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0); in _rtl92ce_poweroff_adapter()
1338 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51); in _rtl92ce_poweroff_adapter()
1339 rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); in _rtl92ce_poweroff_adapter()
1353 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80); in _rtl92ce_poweroff_adapter()
1355 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23); in _rtl92ce_poweroff_adapter()
1364 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e); in _rtl92ce_poweroff_adapter()
1365 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10); in _rtl92ce_poweroff_adapter()
1417 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x18); in rtl92ce_set_beacon_related_registers()
1418 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x18); in rtl92ce_set_beacon_related_registers()
1419 rtl_write_byte(rtlpriv, 0x606, 0x30); in rtl92ce_set_beacon_related_registers()
2114 rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, in rtl92ce_gpio_radio_on_off_checking()
2392 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0); in rtl8192ce_bt_hw_init()
2401 rtl_write_byte(rtlpriv, 0x4fd, u1_tmp); in rtl8192ce_bt_hw_init()
2411 rtl_write_byte(rtlpriv, ROFDM0_TRXPATHENABLE, u1_tmp); in rtl8192ce_bt_hw_init()
2415 rtl_write_byte(rtlpriv, ROFDM1_TRXPATHENABLE, u1_tmp); in rtl8192ce_bt_hw_init()