1134 static void rt61pci_start_queue(struct data_queue *queue)  in rt61pci_start_queue()  argument
1136 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt61pci_start_queue()
1139 	switch (queue->qid) {  in rt61pci_start_queue()
1157 static void rt61pci_kick_queue(struct data_queue *queue)  in rt61pci_kick_queue()  argument
1159 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt61pci_kick_queue()
1162 	switch (queue->qid) {  in rt61pci_kick_queue()
1188 static void rt61pci_stop_queue(struct data_queue *queue)  in rt61pci_stop_queue()  argument
1190 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt61pci_stop_queue()
1193 	switch (queue->qid) {  in rt61pci_stop_queue()
1385 	if (entry->queue->qid == QID_RX) {  in rt61pci_get_entry_state()
1403 	if (entry->queue->qid == QID_RX) {  in rt61pci_clear_entry()
1880 	rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, entry->queue->qid);  in rt61pci_write_tx_desc()
1881 	rt2x00_set_field32(&word, TXD_W1_AIFSN, entry->queue->aifs);  in rt61pci_write_tx_desc()
1882 	rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);  in rt61pci_write_tx_desc()
1883 	rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);  in rt61pci_write_tx_desc()
1905 	rt2x00_set_field32(&word, TXD_W5_PID_TYPE, entry->queue->qid);  in rt61pci_write_tx_desc()
1909 			   TXPOWER_TO_DEV(entry->queue->rt2x00dev->tx_power));  in rt61pci_write_tx_desc()
1913 	if (entry->queue->qid != QID_BEACON) {  in rt61pci_write_tx_desc()
1959 	skbdesc->desc_len = (entry->queue->qid == QID_BEACON) ? TXINFO_SIZE :  in rt61pci_write_tx_desc()
1969 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;  in rt61pci_write_beacon()
2033 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;  in rt61pci_clear_beacon()
2091 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;  in rt61pci_fill_rxdone()
2155 	struct data_queue *queue;  in rt61pci_txdone()  local
2185 		queue = rt2x00queue_get_tx_queue(rt2x00dev, type);  in rt61pci_txdone()
2186 		if (unlikely(!queue))  in rt61pci_txdone()
2194 		if (unlikely(index >= queue->limit))  in rt61pci_txdone()
2197 		entry = &queue->entries[index];  in rt61pci_txdone()
2205 		entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);  in rt61pci_txdone()
2214 			entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);  in rt61pci_txdone()
2900 	struct data_queue *queue;  in rt61pci_conf_tx()  local
2923 	queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx);  in rt61pci_conf_tx()
2931 	rt2x00_set_field32(&reg, field, queue->txop);  in rt61pci_conf_tx()
2939 	rt2x00_set_field32(&reg, field, queue->aifs);  in rt61pci_conf_tx()
2943 	rt2x00_set_field32(&reg, field, queue->cw_min);  in rt61pci_conf_tx()
2947 	rt2x00_set_field32(&reg, field, queue->cw_max);  in rt61pci_conf_tx()
3026 static void rt61pci_queue_init(struct data_queue *queue)  in rt61pci_queue_init()  argument
3028 	switch (queue->qid) {  in rt61pci_queue_init()
3030 		queue->limit = 32;  in rt61pci_queue_init()
3031 		queue->data_size = DATA_FRAME_SIZE;  in rt61pci_queue_init()
3032 		queue->desc_size = RXD_DESC_SIZE;  in rt61pci_queue_init()
3033 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt61pci_queue_init()
3040 		queue->limit = 32;  in rt61pci_queue_init()
3041 		queue->data_size = DATA_FRAME_SIZE;  in rt61pci_queue_init()
3042 		queue->desc_size = TXD_DESC_SIZE;  in rt61pci_queue_init()
3043 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt61pci_queue_init()
3047 		queue->limit = 4;  in rt61pci_queue_init()
3048 		queue->data_size = 0; /* No DMA required for beacons */  in rt61pci_queue_init()
3049 		queue->desc_size = TXINFO_SIZE;  in rt61pci_queue_init()
3050 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt61pci_queue_init()