Lines Matching refs:ops
231 const struct brcmf_buscore_ops *ops; member
249 regdata = ci->ops->read32(ci->ctx, CORE_SB(core->base, sbidhigh)); in brcmf_chip_sb_corerev()
261 regdata = ci->ops->read32(ci->ctx, address); in brcmf_chip_sb_iscoreup()
274 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_iscoreup()
277 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); in brcmf_chip_ai_iscoreup()
291 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
295 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
301 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
302 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_coredisable()
305 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
307 SPINWAIT((ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)) in brcmf_chip_sb_coredisable()
310 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)); in brcmf_chip_sb_coredisable()
314 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow)); in brcmf_chip_sb_coredisable()
316 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
319 ci->ops->write32(ci->ctx, in brcmf_chip_sb_coredisable()
321 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
324 SPINWAIT((ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
332 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), val); in brcmf_chip_sb_coredisable()
333 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
337 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow)); in brcmf_chip_sb_coredisable()
339 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
342 ci->ops->write32(ci->ctx, in brcmf_chip_sb_coredisable()
348 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_coredisable()
362 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); in brcmf_chip_ai_coredisable()
367 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_coredisable()
369 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_coredisable()
372 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, in brcmf_chip_ai_coredisable()
377 SPINWAIT(ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) != in brcmf_chip_ai_coredisable()
382 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_coredisable()
384 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_coredisable()
407 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
410 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
414 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)); in brcmf_chip_sb_resetcore()
416 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatehigh), 0); in brcmf_chip_sb_resetcore()
418 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbimstate)); in brcmf_chip_sb_resetcore()
421 ci->ops->write32(ci->ctx, CORE_SB(base, sbimstate), regdata); in brcmf_chip_sb_resetcore()
425 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
427 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
431 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
433 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
449 while (ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) & in brcmf_chip_ai_resetcore()
451 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, 0); in brcmf_chip_ai_resetcore()
458 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_resetcore()
460 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_resetcore()
535 return core->chip->ops->read32(core->chip->ctx, core->pub.base + reg); in brcmf_chip_core_read32()
541 core->chip->ops->write32(core->chip->ctx, core->pub.base + reg, val); in brcmf_chip_core_write32()
698 val = ci->ops->read32(ci->ctx, *eromaddr); in brcmf_chip_dmp_get_desc()
789 eromaddr = ci->ops->read32(ci->ctx, CORE_CC_REG(SI_ENUM_BASE, eromptr)); in brcmf_chip_dmp_erom_scan()
849 regdata = ci->ops->read32(ci->ctx, CORE_CC_REG(SI_ENUM_BASE, chipid)); in brcmf_chip_recognition()
923 val = chip->ops->read32(chip->ctx, cr4->wrapbase + BCMA_IOCTL); in brcmf_chip_disable_arm()
947 pub->cc_caps = chip->ops->read32(chip->ctx, in brcmf_chip_setup()
952 val = chip->ops->read32(chip->ctx, in brcmf_chip_setup()
962 if (chip->ops->setup) in brcmf_chip_setup()
963 ret = chip->ops->setup(chip->ctx, pub); in brcmf_chip_setup()
969 const struct brcmf_buscore_ops *ops) in brcmf_chip_attach() argument
974 if (WARN_ON(!ops->read32)) in brcmf_chip_attach()
976 if (WARN_ON(!ops->write32)) in brcmf_chip_attach()
978 if (WARN_ON(!ops->prepare)) in brcmf_chip_attach()
980 if (WARN_ON(!ops->activate)) in brcmf_chip_attach()
991 chip->ops = ops; in brcmf_chip_attach()
994 err = ops->prepare(ctx); in brcmf_chip_attach()
1110 chip->ops->activate(chip->ctx, &chip->pub, 0); in brcmf_chip_cm3_set_active()
1136 chip->ops->activate(chip->ctx, &chip->pub, rstvec); in brcmf_chip_cr4_set_active()
1201 chip->ops->write32(chip->ctx, addr, 3); in brcmf_chip_sr_capable()
1203 reg = chip->ops->read32(chip->ctx, addr); in brcmf_chip_sr_capable()
1207 reg = chip->ops->read32(chip->ctx, addr); in brcmf_chip_sr_capable()
1211 reg = chip->ops->read32(chip->ctx, addr); in brcmf_chip_sr_capable()
1216 reg = chip->ops->read32(chip->ctx, addr); in brcmf_chip_sr_capable()