Lines Matching refs:BIT

130 #define BIT_BL_READY	BIT(0)
144 	#define BIT_USER_USER_CPU_MAN_RST	BIT(1) /* user_cpu_man_rst */
146 	#define BIT_USER_MAC_CPU_MAN_RST	BIT(1) /* mac_cpu_man_rst */
151 	#define BIT_USER_CLKS_CAR_AHB_SW_SEL	BIT(1) /* ref clk/PLL */
152 	#define BIT_USER_CLKS_RST_PWGD	BIT(11) /* reset on "power good" */
158 	#define BIT_HPAL_PERST_FROM_PAD	BIT(6)
159 	#define BIT_CAR_PERST_RST	BIT(7)
161 	#define BIT_USER_USER_ICR_SW_INT_2	BIT(18)
165 	#define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF	BIT(2)
168 	#define BIT_DMA_EP_TX_ICR_TX_DONE	BIT(0)
169 	#define BIT_DMA_EP_TX_ICR_TX_DONE_N(n)	BIT(n+1) /* n = [0..23] */
171 	#define BIT_DMA_EP_RX_ICR_RX_DONE	BIT(0)
172 	#define BIT_DMA_EP_RX_ICR_RX_HTRSH	BIT(1)
174 	#define BIT_DMA_EP_MISC_ICR_RX_HTRSH	BIT(0)
175 	#define BIT_DMA_EP_MISC_ICR_TX_NO_ACT	BIT(1)
176 	#define BIT_DMA_EP_MISC_ICR_FW_INT(n)	BIT(28+n) /* n = [0..3] */
182 	#define BIT_DMA_ITR_CNT_CRL_EN		BIT(0)
183 	#define BIT_DMA_ITR_CNT_CRL_EXT_TICK	BIT(1)
184 	#define BIT_DMA_ITR_CNT_CRL_FOREVER	BIT(2)
185 	#define BIT_DMA_ITR_CNT_CRL_CLR		BIT(3)
186 	#define BIT_DMA_ITR_CNT_CRL_REACH_TRSH	BIT(4)
190 	#define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN		BIT(0)
191 	#define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN		BIT(1)
192 	#define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC	BIT(2)
193 	#define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC	BIT(3)
200 	#define BIT_DMA_ITR_TX_CNT_CTL_EN		BIT(0)
201 	#define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL	BIT(1)
202 	#define BIT_DMA_ITR_TX_CNT_CTL_FOREVER		BIT(2)
203 	#define BIT_DMA_ITR_TX_CNT_CTL_CLR		BIT(3)
204 	#define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH	BIT(4)
205 	#define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN		BIT(5)
206 	#define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG	BIT(6)
210 	#define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN			BIT(0)
211 	#define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL		BIT(1)
212 	#define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER		BIT(2)
213 	#define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR			BIT(3)
214 	#define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH	BIT(4)
219 	#define BIT_DMA_ITR_RX_CNT_CTL_EN		BIT(0)
220 	#define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL	BIT(1)
221 	#define BIT_DMA_ITR_RX_CNT_CTL_FOREVER		BIT(2)
222 	#define BIT_DMA_ITR_RX_CNT_CTL_CLR		BIT(3)
223 	#define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH	BIT(4)
224 	#define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN		BIT(5)
225 	#define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG	BIT(6)
229 	#define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN			BIT(0)
230 	#define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL		BIT(1)
231 	#define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER		BIT(2)
232 	#define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR			BIT(3)
233 	#define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH	BIT(4)
238 	#define BIT_DMA_PSEUDO_CAUSE_RX		BIT(0)
239 	#define BIT_DMA_PSEUDO_CAUSE_TX		BIT(1)
240 	#define BIT_DMA_PSEUDO_CAUSE_MISC	BIT(2)
250 	#define BIT_CAF_OSC_XTAL_EN		BIT(0)
252 	#define BIT_CAF_OSC_DIG_XTAL_STABLE	BIT(0)