Lines Matching refs:ar
44 static int carl9170_init_power_cal(struct ar9170 *ar) in carl9170_init_power_cal() argument
46 carl9170_regwrite_begin(ar); in carl9170_init_power_cal()
432 static int carl9170_init_phy_from_eeprom(struct ar9170 *ar, in carl9170_init_phy_from_eeprom() argument
440 struct ar9170_eeprom_modal *m = &ar->eeprom.modal_header[is_2ghz]; in carl9170_init_phy_from_eeprom()
443 carl9170_regwrite_begin(ar); in carl9170_init_phy_from_eeprom()
536 carl9170_regwrite(AR9170_PHY_REG_RX_CHAINMASK, ar->eeprom.rx_mask); in carl9170_init_phy_from_eeprom()
537 carl9170_regwrite(AR9170_PHY_REG_CAL_CHAINMASK, ar->eeprom.rx_mask); in carl9170_init_phy_from_eeprom()
543 static int carl9170_init_phy(struct ar9170 *ar, enum ieee80211_band band) in carl9170_init_phy() argument
548 bool is_40mhz = conf_is_ht40(&ar->hw->conf); in carl9170_init_phy()
550 carl9170_regwrite_begin(ar); in carl9170_init_phy()
573 err = carl9170_init_phy_from_eeprom(ar, is_2ghz, is_40mhz); in carl9170_init_phy()
577 err = carl9170_init_power_cal(ar); in carl9170_init_phy()
581 if (!ar->fw.hw_counters) { in carl9170_init_phy()
582 err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, in carl9170_init_phy()
672 static int carl9170_init_rf_banks_0_7(struct ar9170 *ar, bool band5ghz) in carl9170_init_rf_banks_0_7() argument
676 carl9170_regwrite_begin(ar); in carl9170_init_rf_banks_0_7()
686 wiphy_err(ar->hw->wiphy, "rf init failed\n"); in carl9170_init_rf_banks_0_7()
966 static int carl9170_init_rf_bank4_pwr(struct ar9170 *ar, bool band5ghz, in carl9170_init_rf_bank4_pwr() argument
1021 carl9170_regwrite_begin(ar); in carl9170_init_rf_bank4_pwr()
1117 static int carl9170_set_freq_cal_data(struct ar9170 *ar, in carl9170_set_freq_cal_data() argument
1130 cal_freq_pier = ar->eeprom.cal_freq_pier_2G; in carl9170_set_freq_cal_data()
1136 cal_freq_pier = ar->eeprom.cal_freq_pier_5G; in carl9170_set_freq_cal_data()
1153 carl9170_regwrite_begin(ar); in carl9170_set_freq_cal_data()
1162 cal_pier_data = &ar->eeprom. in carl9170_set_freq_cal_data()
1167 cal_pier_data = &ar->eeprom. in carl9170_set_freq_cal_data()
1217 static u8 carl9170_get_max_edge_power(struct ar9170 *ar, in carl9170_get_max_edge_power() argument
1259 static u8 carl9170_get_heavy_clip(struct ar9170 *ar, u32 freq, in carl9170_get_heavy_clip() argument
1291 static void carl9170_calc_ctl(struct ar9170 *ar, u32 freq, enum carl9170_bw bw) in carl9170_calc_ctl() argument
1308 { CTL_11B, 0, ar->power_2G_cck, 4 }, in carl9170_calc_ctl()
1309 { CTL_11G, 0, ar->power_2G_ofdm, 4 }, in carl9170_calc_ctl()
1310 { CTL_2GHT20, 0, ar->power_2G_ht20, 8 }, in carl9170_calc_ctl()
1311 { CTL_2GHT40, 0, ar->power_2G_ht40, 8 }, in carl9170_calc_ctl()
1314 { CTL_11A, 0, ar->power_5G_leg, 4 }, in carl9170_calc_ctl()
1315 { CTL_5GHT20, 0, ar->power_5G_ht20, 8 }, in carl9170_calc_ctl()
1316 { CTL_5GHT40, 0, ar->power_5G_ht40, 8 }, in carl9170_calc_ctl()
1320 #define EDGES(c, n) (ar->eeprom.ctl_data[c].control_edges[n]) in carl9170_calc_ctl()
1322 ar->heavy_clip = 0; in carl9170_calc_ctl()
1332 ctl_grp = ath_regd_get_band_ctl(&ar->common.regulatory, in carl9170_calc_ctl()
1333 ar->hw->conf.chandef.chan->band); in carl9170_calc_ctl()
1343 if (ar->hw->conf.chandef.chan->band == IEEE80211_BAND_2GHZ) { in carl9170_calc_ctl()
1354 if (c == ar->eeprom.ctl_index[ctl_idx]) in carl9170_calc_ctl()
1364 ar->heavy_clip = in carl9170_calc_ctl()
1365 carl9170_get_heavy_clip(ar, in carl9170_calc_ctl()
1379 carl9170_get_max_edge_power(ar, in carl9170_calc_ctl()
1414 if (ar->heavy_clip & 0xf0) { in carl9170_calc_ctl()
1415 ar->power_2G_ht40[0]--; in carl9170_calc_ctl()
1416 ar->power_2G_ht40[1]--; in carl9170_calc_ctl()
1417 ar->power_2G_ht40[2]--; in carl9170_calc_ctl()
1419 if (ar->heavy_clip & 0xf) { in carl9170_calc_ctl()
1420 ar->power_2G_ht20[0]++; in carl9170_calc_ctl()
1421 ar->power_2G_ht20[1]++; in carl9170_calc_ctl()
1422 ar->power_2G_ht20[2]++; in carl9170_calc_ctl()
1428 static void carl9170_set_power_cal(struct ar9170 *ar, u32 freq, in carl9170_set_power_cal() argument
1452 ctpl = &ar->eeprom.cal_tgt_pwr_5G[0]; in carl9170_set_power_cal()
1454 ctpres = ar->power_5G_leg; in carl9170_set_power_cal()
1457 ctpl = &ar->eeprom.cal_tgt_pwr_2G_cck[0]; in carl9170_set_power_cal()
1459 ctpres = ar->power_2G_cck; in carl9170_set_power_cal()
1462 ctpl = &ar->eeprom.cal_tgt_pwr_2G_ofdm[0]; in carl9170_set_power_cal()
1464 ctpres = ar->power_2G_ofdm; in carl9170_set_power_cal()
1487 ctph = &ar->eeprom.cal_tgt_pwr_5G_ht20[0]; in carl9170_set_power_cal()
1489 ctpres = ar->power_5G_ht20; in carl9170_set_power_cal()
1492 ctph = &ar->eeprom.cal_tgt_pwr_5G_ht40[0]; in carl9170_set_power_cal()
1494 ctpres = ar->power_5G_ht40; in carl9170_set_power_cal()
1497 ctph = &ar->eeprom.cal_tgt_pwr_2G_ht20[0]; in carl9170_set_power_cal()
1499 ctpres = ar->power_2G_ht20; in carl9170_set_power_cal()
1502 ctph = &ar->eeprom.cal_tgt_pwr_2G_ht40[0]; in carl9170_set_power_cal()
1504 ctpres = ar->power_2G_ht40; in carl9170_set_power_cal()
1524 carl9170_calc_ctl(ar, freq, bw); in carl9170_set_power_cal()
1527 int carl9170_get_noisefloor(struct ar9170 *ar) in carl9170_get_noisefloor() argument
1535 BUILD_BUG_ON(ARRAY_SIZE(phy_regs) != ARRAY_SIZE(ar->noise)); in carl9170_get_noisefloor()
1537 err = carl9170_read_mreg(ar, ARRAY_SIZE(phy_regs), phy_regs, phy_res); in carl9170_get_noisefloor()
1542 ar->noise[i] = sign_extend32(GET_VAL( in carl9170_get_noisefloor()
1545 ar->noise[i + 2] = sign_extend32(GET_VAL( in carl9170_get_noisefloor()
1549 if (ar->channel) in carl9170_get_noisefloor()
1550 ar->survey[ar->channel->hw_value].noise = ar->noise[0]; in carl9170_get_noisefloor()
1570 int carl9170_set_channel(struct ar9170 *ar, struct ieee80211_channel *channel, in carl9170_set_channel() argument
1583 if (conf_is_ht(&ar->hw->conf)) in carl9170_set_channel()
1586 if (conf_is_ht40(&ar->hw->conf)) in carl9170_set_channel()
1590 if (ar->channel) { in carl9170_set_channel()
1591 old_channel = ar->channel; in carl9170_set_channel()
1592 ar->channel = NULL; in carl9170_set_channel()
1596 err = carl9170_write_reg(ar, AR9170_PWR_REG_RESET, in carl9170_set_channel()
1601 err = carl9170_write_reg(ar, AR9170_PWR_REG_RESET, 0x0); in carl9170_set_channel()
1605 err = carl9170_init_phy(ar, channel->band); in carl9170_set_channel()
1609 err = carl9170_init_rf_banks_0_7(ar, in carl9170_set_channel()
1614 err = carl9170_exec_cmd(ar, CARL9170_CMD_FREQ_START, 0, NULL, 0, NULL); in carl9170_set_channel()
1618 err = carl9170_write_reg(ar, AR9170_PHY_REG_HEAVY_CLIP_ENABLE, in carl9170_set_channel()
1623 err = carl9170_init_rf_bank4_pwr(ar, in carl9170_set_channel()
1651 if (ar->eeprom.tx_mask != 1) in carl9170_set_channel()
1654 err = carl9170_write_reg(ar, AR9170_PHY_REG_TURBO, tmp); in carl9170_set_channel()
1658 err = carl9170_set_freq_cal_data(ar, channel); in carl9170_set_channel()
1662 carl9170_set_power_cal(ar, channel->center_freq, bw); in carl9170_set_channel()
1664 err = carl9170_set_mac_tpc(ar, channel); in carl9170_set_channel()
1671 if (conf_is_ht40(&ar->hw->conf)) in carl9170_set_channel()
1680 err = carl9170_exec_cmd(ar, CARL9170_CMD_RF_INIT, sizeof(rf), &rf, in carl9170_set_channel()
1687 ar->chan_fail++; in carl9170_set_channel()
1688 ar->total_chan_fail++; in carl9170_set_channel()
1690 wiphy_err(ar->hw->wiphy, "channel change: %d -> %d " in carl9170_set_channel()
1695 if (ar->chan_fail > 3) { in carl9170_set_channel()
1702 carl9170_restart(ar, CARL9170_RR_TOO_MANY_PHY_ERRORS); in carl9170_set_channel()
1706 err = carl9170_set_channel(ar, channel, _bw); in carl9170_set_channel()
1710 ar->chan_fail = 0; in carl9170_set_channel()
1713 if (ar->heavy_clip) { in carl9170_set_channel()
1714 err = carl9170_write_reg(ar, AR9170_PHY_REG_HEAVY_CLIP_ENABLE, in carl9170_set_channel()
1715 0x200 | ar->heavy_clip); in carl9170_set_channel()
1718 wiphy_err(ar->hw->wiphy, "failed to set " in carl9170_set_channel()
1726 ar->channel = channel; in carl9170_set_channel()
1727 ar->ht_settings = new_ht; in carl9170_set_channel()