Lines Matching refs:AR_SREV_9340

692 #define AR_WA			(AR_SREV_9340(ah) ? 0x40c4 : 0x4004)
714 #define AR_HOST_TIMEOUT             (AR_SREV_9340(ah) ? 0x4008 : 0x4018)
744 	((AR_SREV_9100(ah)) ? 0x0600 : (AR_SREV_9340(ah) \
918 #define AR_SREV_9340(_ah) \  macro
922 	(AR_SREV_9340((_ah)) && \
926 	(AR_SREV_9340((_ah)) && \
1027 #define AR_INTR_SYNC_CAUSE                    (AR_SREV_9340(ah) ? 0x4010 : 0x4028)
1028 #define AR_INTR_SYNC_CAUSE_CLR                (AR_SREV_9340(ah) ? 0x4010 : 0x4028)
1031 #define AR_INTR_SYNC_ENABLE                   (AR_SREV_9340(ah) ? 0x4014 : 0x402c)
1073 #define AR_INTR_ASYNC_MASK                       (AR_SREV_9340(ah) ? 0x4018 : 0x4030)
1079 #define AR_INTR_SYNC_MASK                        (AR_SREV_9340(ah) ? 0x401c : 0x4034)
1083 #define AR_INTR_ASYNC_CAUSE_CLR                  (AR_SREV_9340(ah) ? 0x4020 : 0x4038)
1084 #define AR_INTR_ASYNC_CAUSE                      (AR_SREV_9340(ah) ? 0x4020 : 0x4038)
1094 #define AR_INTR_ASYNC_ENABLE                     (AR_SREV_9340(ah) ? 0x4024 : 0x403c)
1100 #define AR_PCIE_PM_CTRL                          (AR_SREV_9340(ah) ? 0x4004 : 0x4014)
1113 #define AR_GPIO_IN_OUT                           (AR_SREV_9340(ah) ? 0x4028 : 0x4048)
1127 #define AR_GPIO_IN				 (AR_SREV_9340(ah) ? 0x402c : 0x404c)
1131 #define AR_GPIO_OE_OUT                           (AR_SREV_9340(ah) ? 0x4030 : \
1156 #define AR_GPIO_INTR_POL                         (AR_SREV_9340(ah) ? 0x4038 : \
1161 #define AR_GPIO_INPUT_EN_VAL                     (AR_SREV_9340(ah) ? 0x403c : \
1180 #define AR_GPIO_INPUT_MUX1                       (AR_SREV_9340(ah) ? 0x4040 : \
1187 #define AR_GPIO_INPUT_MUX2                       (AR_SREV_9340(ah) ? 0x4044 : \
1196 #define AR_GPIO_OUTPUT_MUX1                      (AR_SREV_9340(ah) ? 0x4048 : \
1198 #define AR_GPIO_OUTPUT_MUX2                      (AR_SREV_9340(ah) ? 0x404c : \
1200 #define AR_GPIO_OUTPUT_MUX3                      (AR_SREV_9340(ah) ? 0x4050 : \
1203 #define AR_INPUT_STATE                           (AR_SREV_9340(ah) ? 0x4054 : \
1206 #define AR_EEPROM_STATUS_DATA                    (AR_SREV_9340(ah) ? 0x40c8 : \
1215 #define AR_OBS                  (AR_SREV_9340(ah) ? 0x405c : \
1220 #define AR_PCIE_MSI                             (AR_SREV_9340(ah) ? 0x40d8 : \
1224 #define AR_INTR_PRIO_SYNC_ENABLE  (AR_SREV_9340(ah) ? 0x4088 : 0x40c4)
1225 #define AR_INTR_PRIO_ASYNC_MASK   (AR_SREV_9340(ah) ? 0x408c : 0x40c8)
1226 #define AR_INTR_PRIO_SYNC_MASK    (AR_SREV_9340(ah) ? 0x4090 : 0x40cc)
1227 #define AR_INTR_PRIO_ASYNC_ENABLE (AR_SREV_9340(ah) ? 0x4094 : 0x40d4)