730 	REG_SET_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);  in ar9003_get_pll_sqsum_dvc()
827 		REG_SET_BIT(ah, AR_PHY_PLL_MODE, 0x1 << 16);  in ath9k_hw_init_pll()
1033 		REG_SET_BIT(ah, AR_PCU_MISC, ah->misc_mode);  in ath9k_hw_init_global_settings()
1166 		REG_SET_BIT(ah, AR_AHB_MODE, AR_AHB_PREFETCH_RD_EN);  in ath9k_hw_set_dma()
1239 			REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);  in ath9k_hw_set_operating_mode()
1644 		REG_SET_BIT(ah, AR_PCU_MISC_MODE2,  in ath9k_hw_init_mfp()
1904 		REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);  in ath9k_hw_reset()
1954 		REG_SET_BIT(ah, AR_MAC_PCU_LOGIC_ANALYZER,  in ath9k_hw_reset()
1958 		REG_SET_BIT(ah, AR_PCU_MISC_MODE2,  in ath9k_hw_reset()
1962 	REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);  in ath9k_hw_reset()
2024 		REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON);  in ath9k_hw_reset()
2046 	REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);  in ath9k_set_power_sleep()
2089 	REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);  in ath9k_set_power_network_sleep()
2144 		REG_SET_BIT(ah, AR_RTC_RESET,  in ath9k_hw_set_power_awake()
2147 	REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,  in ath9k_hw_set_power_awake()
2159 		REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,  in ath9k_hw_set_power_awake()
2239 		REG_SET_BIT(ah, AR_TXCFG,  in ath9k_hw_beaconinit()
2264 	REG_SET_BIT(ah, AR_TIMER_MODE, flags);  in ath9k_hw_beaconinit()
2327 	REG_SET_BIT(ah, AR_TIMER_MODE,  in ath9k_hw_set_sta_beacon_timers()
2775 		REG_SET_BIT(ah, AR_RXCFG, AR_RXCFG_ZLFDMA);  in ath9k_hw_setrxfilter()
2990 		REG_SET_BIT(ah, AR_DIRECT_CONNECT, AR_DC_AP_STA_EN);  in ath9k_hw_gen_timer_start_tsf2()
2991 		REG_SET_BIT(ah, AR_RESET_TSF, AR_RESET_TSF2_ONCE);  in ath9k_hw_gen_timer_start_tsf2()
3049 	REG_SET_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,  in ath9k_hw_gen_timer_start()
3062 			REG_SET_BIT(ah, AR_MAC_PCU_GEN_TIMER_TSF_SEL,  in ath9k_hw_gen_timer_start()
3073 	REG_SET_BIT(ah, AR_IMR_S5, mask);  in ath9k_hw_gen_timer_start()