1115 			aniState->iniDef.m1ThreshLow : m1ThreshLow_off;  in ar9003_hw_ani_control()
1117 			aniState->iniDef.m2ThreshLow : m2ThreshLow_off;  in ar9003_hw_ani_control()
1119 			aniState->iniDef.m1Thresh : m1Thresh_off;  in ar9003_hw_ani_control()
1121 			aniState->iniDef.m2Thresh : m2Thresh_off;  in ar9003_hw_ani_control()
1123 			aniState->iniDef.m2CountThr : m2CountThr_off;  in ar9003_hw_ani_control()
1125 			aniState->iniDef.m2CountThrLow : m2CountThrLow_off;  in ar9003_hw_ani_control()
1127 			aniState->iniDef.m1ThreshLowExt : m1ThreshLowExt_off;  in ar9003_hw_ani_control()
1129 			aniState->iniDef.m2ThreshLowExt : m2ThreshLowExt_off;  in ar9003_hw_ani_control()
1131 			aniState->iniDef.m1ThreshExt : m1ThreshExt_off;  in ar9003_hw_ani_control()
1133 			aniState->iniDef.m2ThreshExt : m2ThreshExt_off;  in ar9003_hw_ani_control()
1204 			aniState->iniDef.firstep;  in ar9003_hw_ani_control()
1219 			 aniState->iniDef.firstepLow;  in ar9003_hw_ani_control()
1236 				aniState->iniDef.firstep);  in ar9003_hw_ani_control()
1244 				aniState->iniDef.firstepLow);  in ar9003_hw_ani_control()
1268 			aniState->iniDef.cycpwrThr1;  in ar9003_hw_ani_control()
1284 			 aniState->iniDef.cycpwrThr1Ext;  in ar9003_hw_ani_control()
1300 				aniState->iniDef.cycpwrThr1);  in ar9003_hw_ani_control()
1308 				aniState->iniDef.cycpwrThr1Ext);  in ar9003_hw_ani_control()
1419 	struct ath9k_ani_default *iniDef;  in ar9003_hw_ani_cache_ini_regs()  local
1423 	iniDef = &aniState->iniDef;  in ar9003_hw_ani_cache_ini_regs()
1432 	iniDef->m1Thresh = MS(val, AR_PHY_SFCORR_M1_THRESH);  in ar9003_hw_ani_cache_ini_regs()
1433 	iniDef->m2Thresh = MS(val, AR_PHY_SFCORR_M2_THRESH);  in ar9003_hw_ani_cache_ini_regs()
1434 	iniDef->m2CountThr = MS(val, AR_PHY_SFCORR_M2COUNT_THR);  in ar9003_hw_ani_cache_ini_regs()
1437 	iniDef->m1ThreshLow = MS(val, AR_PHY_SFCORR_LOW_M1_THRESH_LOW);  in ar9003_hw_ani_cache_ini_regs()
1438 	iniDef->m2ThreshLow = MS(val, AR_PHY_SFCORR_LOW_M2_THRESH_LOW);  in ar9003_hw_ani_cache_ini_regs()
1439 	iniDef->m2CountThrLow = MS(val, AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW);  in ar9003_hw_ani_cache_ini_regs()
1442 	iniDef->m1ThreshExt = MS(val, AR_PHY_SFCORR_EXT_M1_THRESH);  in ar9003_hw_ani_cache_ini_regs()
1443 	iniDef->m2ThreshExt = MS(val, AR_PHY_SFCORR_EXT_M2_THRESH);  in ar9003_hw_ani_cache_ini_regs()
1444 	iniDef->m1ThreshLowExt = MS(val, AR_PHY_SFCORR_EXT_M1_THRESH_LOW);  in ar9003_hw_ani_cache_ini_regs()
1445 	iniDef->m2ThreshLowExt = MS(val, AR_PHY_SFCORR_EXT_M2_THRESH_LOW);  in ar9003_hw_ani_cache_ini_regs()
1446 	iniDef->firstep = REG_READ_FIELD(ah,  in ar9003_hw_ani_cache_ini_regs()
1449 	iniDef->firstepLow = REG_READ_FIELD(ah,  in ar9003_hw_ani_cache_ini_regs()
1452 	iniDef->cycpwrThr1 = REG_READ_FIELD(ah,  in ar9003_hw_ani_cache_ini_regs()
1455 	iniDef->cycpwrThr1Ext = REG_READ_FIELD(ah,  in ar9003_hw_ani_cache_ini_regs()