289 	int tmp_mask;  in ar5008_hw_spur_mitigate()  local
380 	tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)  in ar5008_hw_spur_mitigate()
388 	REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);  in ar5008_hw_spur_mitigate()
389 	REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);  in ar5008_hw_spur_mitigate()
391 	tmp_mask = (mask_m[31] << 28)  in ar5008_hw_spur_mitigate()
399 	REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);  in ar5008_hw_spur_mitigate()
400 	REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);  in ar5008_hw_spur_mitigate()
402 	tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)  in ar5008_hw_spur_mitigate()
410 	REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);  in ar5008_hw_spur_mitigate()
411 	REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);  in ar5008_hw_spur_mitigate()
413 	tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)  in ar5008_hw_spur_mitigate()
421 	REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);  in ar5008_hw_spur_mitigate()
422 	REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);  in ar5008_hw_spur_mitigate()
424 	tmp_mask = (mask_p[15] << 28)  in ar5008_hw_spur_mitigate()
432 	REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);  in ar5008_hw_spur_mitigate()
433 	REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);  in ar5008_hw_spur_mitigate()
435 	tmp_mask = (mask_p[30] << 28)  in ar5008_hw_spur_mitigate()
443 	REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);  in ar5008_hw_spur_mitigate()
444 	REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);  in ar5008_hw_spur_mitigate()
446 	tmp_mask = (mask_p[45] << 28)  in ar5008_hw_spur_mitigate()
454 	REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);  in ar5008_hw_spur_mitigate()
455 	REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);  in ar5008_hw_spur_mitigate()
457 	tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)  in ar5008_hw_spur_mitigate()
465 	REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);  in ar5008_hw_spur_mitigate()
466 	REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);  in ar5008_hw_spur_mitigate()