Lines Matching refs:bTmp

504 	__u8 bTmp;  in Sdelay()  local
509 bTmp = inb(0xeb); in Sdelay()
510 outb(bTmp, 0xeb); in Sdelay()
517 __u8 bTmp; in Tdelay() local
522 bTmp = inb(0xeb); in Tdelay()
523 outb(bTmp, 0xeb); in Tdelay()
531 __u8 bTmp; in ActClk() local
532 bTmp = ReadReg(iobase, 0x34); in ActClk()
534 WriteReg(iobase, 0x34, bTmp | Clk_bit); in ActClk()
536 WriteReg(iobase, 0x34, bTmp & ~Clk_bit); in ActClk()
541 __u8 bTmp; in ClkTx() local
543 bTmp = ReadReg(iobase, 0x34); in ClkTx()
545 bTmp &= ~Clk_bit; in ClkTx()
548 bTmp |= Clk_bit; in ClkTx()
550 WriteReg(iobase, 0x34, bTmp); in ClkTx()
553 bTmp &= ~Tx_bit; in ClkTx()
556 bTmp |= Tx_bit; in ClkTx()
558 WriteReg(iobase, 0x34, bTmp); in ClkTx()
589 __u8 data = 0, bTmp, data_bit; in Rd_Indx() local
592 bTmp = addr | (index << 1) | 0; in Rd_Indx()
597 Wr_Byte(iobase, bTmp); in Rd_Indx()
608 bTmp = ReadReg(iobase, 0x34); in Rd_Indx()
609 if (!(bTmp & Rd_Valid)) in Rd_Indx()
612 if (!(bTmp & Rd_Valid)) { in Rd_Indx()
617 bTmp = ReadReg(iobase, 0x34); in Rd_Indx()
619 if (bTmp & RxBit) in Rd_Indx()
632 bTmp = ReadReg(iobase, 0x34); in Rd_Indx()
654 __u8 bTmp; in Wr_Indx() local
660 bTmp = addr | (index << 1) | 1; in Wr_Indx()
661 Wr_Byte(iobase, bTmp); in Wr_Indx()
689 __u8 bTmp; in SetSITmode() local
691 bTmp = ReadLPCReg(0x28); in SetSITmode()
692 WriteLPCReg(0x28, bTmp | 0x10); //select ITMOFF in SetSITmode()
693 bTmp = ReadReg(iobase, 0x35); in SetSITmode()
694 WriteReg(iobase, 0x35, bTmp | 0x40); // Driver ITMOFF in SetSITmode()
695 WriteReg(iobase, 0x28, bTmp | 0x80); // enable All interrupt in SetSITmode()
701 __u8 bTmp; in SI_SetMode() local
710 bTmp = Rd_Indx(iobase, 0x40, 1); in SI_SetMode()