234 static __u8 ReadReg(unsigned int BaseAddr, int iRegNum)  in ReadReg()  function
254 	Rtemp = ReadReg(BaseAddr, RegNum);  in WriteRegBit()
277 	temp = ReadReg(BaseAddr, RegNum);  in CheckRegBit()
338 #define GetSIRBOF(BaseAddr)        ReadReg(BaseAddr,I_SIR_BOF)
339 #define GetSIREOF(BaseAddr)        ReadReg(BaseAddr,I_SIR_EOF)
362 #define GetIntIndentify(BaseAddr)   ((ReadReg(BaseAddr,H_ST)&0xf1) >>1)
364 #define GetHostStatus(BaseAddr)     ReadReg(BaseAddr,H_ST)	//RO
382 #define GetTXStatus(BaseAddr) 	ReadReg(BaseAddr,TX_ST)	//RO
388 #define GetRXStatus(BaseAddr) 	ReadReg(BaseAddr,RX_ST)	//RO
404 #define GetFIRVersion(BaseAddr)		ReadReg(BaseAddr,VERSION)
440 	low = ReadReg(iobase, RX_C_L);  in CkRxRecv()
441 	high = ReadReg(iobase, RX_C_H);  in CkRxRecv()
445 	low = ReadReg(iobase, RX_C_L);  in CkRxRecv()
446 	high = ReadReg(iobase, RX_C_H);  in CkRxRecv()
461 	low = ReadReg(iobase, RX_P_L);  in RxCurCount()
462 	high = ReadReg(iobase, RX_P_H);  in RxCurCount()
477 	low = ReadReg(iobase, RX_P_L);  in GetRecvByte()
478 	high = ReadReg(iobase, RX_P_H);  in GetRecvByte()
532 	bTmp = ReadReg(iobase, 0x34);  in ActClk()
543 	bTmp = ReadReg(iobase, 0x34);  in ClkTx()
608 		bTmp = ReadReg(iobase, 0x34);  in Rd_Indx()
617 			bTmp = ReadReg(iobase, 0x34);  in Rd_Indx()
632 		bTmp = ReadReg(iobase, 0x34);  in Rd_Indx()
693 	bTmp = ReadReg(iobase, 0x35);  in SetSITmode()
778 	temp = (ReadReg(iobase, I_CF_H_1) & 0x03);  in SetBaudRate()
787 	temp = (ReadReg(iobase, I_CF_L_1) & 0x1f);  in SetPulseWidth()
788 	temp1 = (ReadReg(iobase, I_CF_H_1) & 0xfc);  in SetPulseWidth()
801 	temp = ReadReg(iobase, I_CF_L_1) & 0xe0;  in SetSendPreambleCount()
811 	tmp = ReadReg(BaseAddr, I_CF_L_0);  in SetVFIR()
821 	tmp = ReadReg(BaseAddr, I_CF_L_0);  in SetFIR()
831 	tmp = ReadReg(BaseAddr, I_CF_L_0);  in SetMIR()
841 	tmp = ReadReg(BaseAddr, I_CF_L_0);  in SetSIR()