239 			reg = inb(cfg_base);  in nsc_ircc_init()
248 			id = inb(cfg_base+1);  in nsc_ircc_init()
615 	reg = inb(cfg_base+1);  in nsc_ircc_probe_108()
637 	reg = inb(cfg_base+1);  in nsc_ircc_probe_108()
686 	reg = inb(cfg_base+1);  in nsc_ircc_probe_108()
723 	reg = inb(cfg_base+1);  in nsc_ircc_probe_338()
729 	reg = inb(cfg_base+1);  in nsc_ircc_probe_338()
735 		reg = (inb(cfg_base+1) & 0xfe) << 2;  in nsc_ircc_probe_338()
738 		reg |= ((inb(cfg_base+1) & 0xfc) << 8);  in nsc_ircc_probe_338()
744 		reg = inb(cfg_base+1);  in nsc_ircc_probe_338()
794 	reg = inb(cfg_base+1);  in nsc_ircc_probe_338()
800 	reg = inb(cfg_base+1);  in nsc_ircc_probe_338()
806 	reg = inb(cfg_base+1);  in nsc_ircc_probe_338()
848 	enabled = inb(cfg_base+1) & 0x01;  in nsc_ircc_init_39x()
890 	reg1 = inb(cfg_base+1);  in nsc_ircc_probe_39x()
892 	reg2 = inb(cfg_base+1);  in nsc_ircc_probe_39x()
896 	irq = inb(cfg_base+1);  in nsc_ircc_probe_39x()
898 	irqt = inb(cfg_base+1);  in nsc_ircc_probe_39x()
902 	dma1 = inb(cfg_base+1);  in nsc_ircc_probe_39x()
904 	dma2 = inb(cfg_base+1);  in nsc_ircc_probe_39x()
908 	info->enabled = enabled = inb(cfg_base+1) & 0x01;  in nsc_ircc_probe_39x()
911 	susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);  in nsc_ircc_probe_39x()
920 	enabled = inb(cfg_base+1) & 0x01;  in nsc_ircc_probe_39x()
992 	version = inb(iobase+MID);  in nsc_ircc_setup()
1050 	bank = inb(iobase+BSR);  in nsc_ircc_read_dongle_id()
1062 	dongle_id = inb(iobase+4) & 0x0f;  in nsc_ircc_read_dongle_id()
1089 	bank = inb(iobase+BSR);  in nsc_ircc_init_dongle_interface()
1174 	bank = inb(iobase+BSR);  in nsc_ircc_change_dongle_speed()
1272 	bank = inb(iobase+BSR);  in nsc_ircc_change_speed()
1292 		outb(inb(iobase+4) | 0x04, iobase+4);  in nsc_ircc_change_speed()
1411 	bank = inb(iobase+BSR);  in nsc_ircc_hard_xmit_sir()
1484 	bank = inb(iobase+BSR);  in nsc_ircc_hard_xmit_fir()
1574 	bsr = inb(iobase+BSR);  in nsc_ircc_dma_xmit()
1578 	outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);  in nsc_ircc_dma_xmit()
1594 	outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);  in nsc_ircc_dma_xmit()
1613 	bank = inb(iobase+BSR);  in nsc_ircc_pio_write()
1655 	bank = inb(iobase+BSR);  in nsc_ircc_dma_xmit_complete()
1659         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);  in nsc_ircc_dma_xmit_complete()
1662 	if (inb(iobase+ASCR) & ASCR_TXUR) {  in nsc_ircc_dma_xmit_complete()
1721 	bsr = inb(iobase+BSR);  in nsc_ircc_dma_receive()
1725 	outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);  in nsc_ircc_dma_receive()
1746 	outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);  in nsc_ircc_dma_receive()
1772 	bank = inb(iobase+BSR);  in nsc_ircc_dma_receive_complete()
1776 	while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {  in nsc_ircc_dma_receive_complete()
1778 		len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);  in nsc_ircc_dma_receive_complete()
1836 				if (inb(iobase+LSR) & LSR_RXDA) {  in nsc_ircc_dma_receive_complete()
1927 		byte = inb(iobase+RXD);  in nsc_ircc_pio_receive()
1930 	} while (inb(iobase+LSR) & LSR_RXDA); /* Data available */	  in nsc_ircc_pio_receive()
2009 	bank = inb(iobase+BSR);  in nsc_ircc_fir_interrupt()
2097 	bsr = inb(iobase+BSR); 	/* Save current bank */  in nsc_ircc_interrupt()
2100 	self->ier = inb(iobase+IER);   in nsc_ircc_interrupt()
2101 	eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */   in nsc_ircc_interrupt()
2141 		bank = inb(iobase+BSR);  in nsc_ircc_is_receiving()
2143 		if ((inb(iobase+RXFLV) & 0x3f) != 0) {  in nsc_ircc_is_receiving()
2194 	bank = inb(iobase+BSR);  in nsc_ircc_net_open()
2249 	bank = inb(iobase+BSR);  in nsc_ircc_net_close()
2329 		bank = inb(iobase+BSR);  in nsc_ircc_suspend()