Lines Matching refs:port
64 static void bfin_sir_stop_tx(struct bfin_sir_port *port) in bfin_sir_stop_tx() argument
67 disable_dma(port->tx_dma_channel); in bfin_sir_stop_tx()
70 while (!(UART_GET_LSR(port) & THRE)) { in bfin_sir_stop_tx()
75 UART_CLEAR_IER(port, ETBEI); in bfin_sir_stop_tx()
78 static void bfin_sir_enable_tx(struct bfin_sir_port *port) in bfin_sir_enable_tx() argument
80 UART_SET_IER(port, ETBEI); in bfin_sir_enable_tx()
83 static void bfin_sir_stop_rx(struct bfin_sir_port *port) in bfin_sir_stop_rx() argument
85 UART_CLEAR_IER(port, ERBFI); in bfin_sir_stop_rx()
88 static void bfin_sir_enable_rx(struct bfin_sir_port *port) in bfin_sir_enable_rx() argument
90 UART_SET_IER(port, ERBFI); in bfin_sir_enable_rx()
93 static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed) in bfin_sir_set_speed() argument
115 quot = (port->clk + (8 * speed)) / (16 * speed); in bfin_sir_set_speed()
119 lsr = UART_GET_LSR(port); in bfin_sir_set_speed()
128 val = UART_GET_GCTL(port); in bfin_sir_set_speed()
130 UART_PUT_GCTL(port, val); in bfin_sir_set_speed()
133 UART_SET_DLAB(port); in bfin_sir_set_speed()
136 UART_PUT_DLL(port, quot & 0xFF); in bfin_sir_set_speed()
137 UART_PUT_DLH(port, (quot >> 8) & 0xFF); in bfin_sir_set_speed()
141 UART_CLEAR_DLAB(port); in bfin_sir_set_speed()
144 UART_PUT_LCR(port, lcr); in bfin_sir_set_speed()
146 val = UART_GET_GCTL(port); in bfin_sir_set_speed()
148 UART_PUT_GCTL(port, val); in bfin_sir_set_speed()
157 val = UART_GET_GCTL(port); in bfin_sir_set_speed()
162 UART_PUT_GCTL(port, val); in bfin_sir_set_speed()
169 struct bfin_sir_port *port = self->sir_port; in bfin_sir_is_receiving() local
171 if (!(UART_GET_IER(port) & ERBFI)) in bfin_sir_is_receiving()
181 struct bfin_sir_port *port = self->sir_port; in bfin_sir_tx_chars() local
185 UART_PUT_CHAR(port, chr); in bfin_sir_tx_chars()
192 bfin_sir_set_speed(port, self->newspeed); in bfin_sir_tx_chars()
196 bfin_sir_stop_tx(port); in bfin_sir_tx_chars()
197 bfin_sir_enable_rx(port); in bfin_sir_tx_chars()
206 struct bfin_sir_port *port = self->sir_port; in bfin_sir_rx_chars() local
209 UART_CLEAR_LSR(port); in bfin_sir_rx_chars()
210 ch = UART_GET_CHAR(port); in bfin_sir_rx_chars()
219 struct bfin_sir_port *port = self->sir_port; in bfin_sir_rx_int() local
222 while ((UART_GET_LSR(port) & DR)) in bfin_sir_rx_int()
233 struct bfin_sir_port *port = self->sir_port; in bfin_sir_tx_int() local
236 if (UART_GET_LSR(port) & THRE) in bfin_sir_tx_int()
248 struct bfin_sir_port *port = self->sir_port; in bfin_sir_dma_tx_chars() local
250 if (!port->tx_done) in bfin_sir_dma_tx_chars()
252 port->tx_done = 0; in bfin_sir_dma_tx_chars()
257 bfin_sir_set_speed(port, self->newspeed); in bfin_sir_dma_tx_chars()
261 bfin_sir_enable_rx(port); in bfin_sir_dma_tx_chars()
262 port->tx_done = 1; in bfin_sir_dma_tx_chars()
269 set_dma_config(port->tx_dma_channel, in bfin_sir_dma_tx_chars()
273 set_dma_start_addr(port->tx_dma_channel, in bfin_sir_dma_tx_chars()
275 set_dma_x_count(port->tx_dma_channel, self->tx_buff.len); in bfin_sir_dma_tx_chars()
276 set_dma_x_modify(port->tx_dma_channel, 1); in bfin_sir_dma_tx_chars()
277 enable_dma(port->tx_dma_channel); in bfin_sir_dma_tx_chars()
284 struct bfin_sir_port *port = self->sir_port; in bfin_sir_dma_tx_int() local
287 if (!(get_dma_curr_irqstat(port->tx_dma_channel) & DMA_RUN)) { in bfin_sir_dma_tx_int()
288 clear_dma_irqstat(port->tx_dma_channel); in bfin_sir_dma_tx_int()
289 bfin_sir_stop_tx(port); in bfin_sir_dma_tx_int()
295 bfin_sir_set_speed(port, self->newspeed); in bfin_sir_dma_tx_int()
299 bfin_sir_enable_rx(port); in bfin_sir_dma_tx_int()
302 port->tx_done = 1; in bfin_sir_dma_tx_int()
312 struct bfin_sir_port *port = self->sir_port; in bfin_sir_dma_rx_chars() local
315 UART_CLEAR_LSR(port); in bfin_sir_dma_rx_chars()
317 for (i = port->rx_dma_buf.head; i < port->rx_dma_buf.tail; i++) in bfin_sir_dma_rx_chars()
318 async_unwrap_char(dev, &self->stats, &self->rx_buff, port->rx_dma_buf.buf[i]); in bfin_sir_dma_rx_chars()
324 struct bfin_sir_port *port = self->sir_port; in bfin_sir_rx_dma_timeout() local
329 x_pos = DMA_SIR_RX_XCNT - get_dma_curr_xcount(port->rx_dma_channel); in bfin_sir_rx_dma_timeout()
333 pos = port->rx_dma_nrows * DMA_SIR_RX_XCNT + x_pos; in bfin_sir_rx_dma_timeout()
335 if (pos > port->rx_dma_buf.tail) { in bfin_sir_rx_dma_timeout()
336 port->rx_dma_buf.tail = pos; in bfin_sir_rx_dma_timeout()
338 port->rx_dma_buf.head = port->rx_dma_buf.tail; in bfin_sir_rx_dma_timeout()
347 struct bfin_sir_port *port = self->sir_port; in bfin_sir_dma_rx_int() local
352 port->rx_dma_nrows++; in bfin_sir_dma_rx_int()
353 port->rx_dma_buf.tail = DMA_SIR_RX_XCNT * port->rx_dma_nrows; in bfin_sir_dma_rx_int()
355 if (port->rx_dma_nrows >= DMA_SIR_RX_YCNT) { in bfin_sir_dma_rx_int()
356 port->rx_dma_nrows = 0; in bfin_sir_dma_rx_int()
357 port->rx_dma_buf.tail = 0; in bfin_sir_dma_rx_int()
359 port->rx_dma_buf.head = port->rx_dma_buf.tail; in bfin_sir_dma_rx_int()
361 irqstat = get_dma_curr_irqstat(port->rx_dma_channel); in bfin_sir_dma_rx_int()
362 clear_dma_irqstat(port->rx_dma_channel); in bfin_sir_dma_rx_int()
365 mod_timer(&port->rx_dma_timer, jiffies + DMA_SIR_RX_FLUSH_JIFS); in bfin_sir_dma_rx_int()
370 static int bfin_sir_startup(struct bfin_sir_port *port, struct net_device *dev) in bfin_sir_startup() argument
376 if (request_dma(port->rx_dma_channel, "BFIN_UART_RX") < 0) { in bfin_sir_startup()
381 if (request_dma(port->tx_dma_channel, "BFIN_UART_TX") < 0) { in bfin_sir_startup()
383 free_dma(port->rx_dma_channel); in bfin_sir_startup()
389 set_dma_callback(port->rx_dma_channel, bfin_sir_dma_rx_int, dev); in bfin_sir_startup()
390 set_dma_callback(port->tx_dma_channel, bfin_sir_dma_tx_int, dev); in bfin_sir_startup()
392 port->rx_dma_buf.buf = dma_alloc_coherent(NULL, PAGE_SIZE, in bfin_sir_startup()
394 port->rx_dma_buf.head = 0; in bfin_sir_startup()
395 port->rx_dma_buf.tail = 0; in bfin_sir_startup()
396 port->rx_dma_nrows = 0; in bfin_sir_startup()
398 set_dma_config(port->rx_dma_channel, in bfin_sir_startup()
402 set_dma_x_count(port->rx_dma_channel, DMA_SIR_RX_XCNT); in bfin_sir_startup()
403 set_dma_x_modify(port->rx_dma_channel, 1); in bfin_sir_startup()
404 set_dma_y_count(port->rx_dma_channel, DMA_SIR_RX_YCNT); in bfin_sir_startup()
405 set_dma_y_modify(port->rx_dma_channel, 1); in bfin_sir_startup()
406 set_dma_start_addr(port->rx_dma_channel, (unsigned long)port->rx_dma_buf.buf); in bfin_sir_startup()
407 enable_dma(port->rx_dma_channel); in bfin_sir_startup()
409 port->rx_dma_timer.data = (unsigned long)(dev); in bfin_sir_startup()
410 port->rx_dma_timer.function = (void *)bfin_sir_rx_dma_timeout; in bfin_sir_startup()
414 if (request_irq(port->irq, bfin_sir_rx_int, 0, "BFIN_SIR_RX", dev)) { in bfin_sir_startup()
419 if (request_irq(port->irq+1, bfin_sir_tx_int, 0, "BFIN_SIR_TX", dev)) { in bfin_sir_startup()
421 free_irq(port->irq, dev); in bfin_sir_startup()
429 static void bfin_sir_shutdown(struct bfin_sir_port *port, struct net_device *dev) in bfin_sir_shutdown() argument
433 bfin_sir_stop_rx(port); in bfin_sir_shutdown()
435 val = UART_GET_GCTL(port); in bfin_sir_shutdown()
437 UART_PUT_GCTL(port, val); in bfin_sir_shutdown()
440 disable_dma(port->tx_dma_channel); in bfin_sir_shutdown()
441 disable_dma(port->rx_dma_channel); in bfin_sir_shutdown()
442 del_timer(&(port->rx_dma_timer)); in bfin_sir_shutdown()
443 dma_free_coherent(NULL, PAGE_SIZE, port->rx_dma_buf.buf, 0); in bfin_sir_shutdown()
445 free_irq(port->irq+1, dev); in bfin_sir_shutdown()
446 free_irq(port->irq, dev); in bfin_sir_shutdown()
448 free_dma(port->tx_dma_channel); in bfin_sir_shutdown()
449 free_dma(port->rx_dma_channel); in bfin_sir_shutdown()
478 struct bfin_sir_port *port; in bfin_sir_resume() local
486 port = self->sir_port; in bfin_sir_resume()
492 bfin_sir_startup(port, dev); in bfin_sir_resume()
493 bfin_sir_set_speed(port, 9600); in bfin_sir_resume()
494 bfin_sir_enable_rx(port); in bfin_sir_resume()
508 struct bfin_sir_port *port = self->sir_port; in bfin_sir_send_work() local
515 bfin_sir_stop_rx(port); in bfin_sir_send_work()
521 val = UART_GET_GCTL(port); in bfin_sir_send_work()
523 UART_PUT_GCTL(port, val); in bfin_sir_send_work()
526 UART_PUT_GCTL(port, val); in bfin_sir_send_work()
533 bfin_sir_enable_tx(port); in bfin_sir_send_work()
565 struct bfin_sir_port *port = self->sir_port; in bfin_sir_ioctl() local
572 ret = bfin_sir_set_speed(port, rq->ifr_baudrate); in bfin_sir_ioctl()
573 bfin_sir_enable_rx(port); in bfin_sir_ioctl()
611 struct bfin_sir_port *port = self->sir_port; in bfin_sir_open() local
619 err = bfin_sir_startup(port, dev); in bfin_sir_open()
623 bfin_sir_set_speed(port, 9600); in bfin_sir_open()
637 bfin_sir_enable_rx(port); in bfin_sir_open()
645 bfin_sir_shutdown(port, dev); in bfin_sir_open()